infra/rdn2cfg2: add user guide for RD-N2-Cfg2 platform

Add the initial user guide for the RD-N2-Cfg2 platform software stack.
The user guide points to documents that provide information about
obtaining the platform software stack and using the various features it
supports. A table to list the release tags is included as well.
Signed-off-by: Zakaria Zahi <zakaria.zahi@arm.com>
Change-Id: I222b82370437ba588a675b1e509ad347d426a432

docs/infra/common/download-sources.rst

@@ -67,6 +67,8 @@ the subsequent instructions.
 +--------------------------+-------------------------+
 | RD-N2-Cfg1               | pinned-rdn2cfg1.xml     |
 +--------------------------+-------------------------+
+| RD-N2-Cfg2               | pinned-rdn2cfg2.xml     |
++--------------------------+-------------------------+
 | RD-V1 (Single Chip)      | pinned-rdv1.xml         |
 +--------------------------+-------------------------+
 | RD-V1 (Quad Chip)        | pinned-rdv1mc.xml       |

docs/infra/common/platform_names.rst

@@ -16,6 +16,8 @@ mentioned in the commands in other documents.
 +--------------------------+-------------------------+
 | RD-N2-Cfg1               | rdn2cfg1                |
 +--------------------------+-------------------------+
+| RD-N2-Cfg2 (Quad chip)   | rdn2cfg2                |
++--------------------------+-------------------------+
 | RD-V1 (Single Chip)      | rdv1                    |
 +--------------------------+-------------------------+
 | RD-V1 (Quad Chip)        | rdv1mc                  |

docs/infra/rdn2cfg2/readme.rst

+RD-N2 Cfg2 platform software user guide
+=======================================
+
+.. contents::
+
+
+Introduction
+------------
+
+RD (Reference Design) is a collection of resources to provide a representative
+view of typical compute subsystems that can be designed and implemented using
+specific generations of Arm IP. RD-N2 Cfg2 platform (which is a quad-chip
+variant of the the `RD-N2`_ platform) will henceforth be referred as RD-N2-Cfg2.
+
+RD-N2-Cfg2 is a quad-chip platform in which four identical chips are connected
+through high speed CCG link. The CCG link is enabled through CMN-700 Coherent
+Multichip Link (CML) feature. RD-N2-Cfg2 in particular has the following
+hardware configuration on each chip.
+
+- 4xMP1 Neoverse N2 CPUs
+- CMN-700 interconnect (mesh size 6x6)
+- Multiple AXI expansion ports for I/O Coherent PCIe, Ethernet, offload
+- Arm Cortex-M7 for System Control Processor (SCP) and
+  Manageability Control Processor (MCP)
+
+This document is a user guide on how to setup, build and run the RD-N2-Cfg2
+software stack on the Fixed Virtual Platform. The components integrated into
+this stack is described in the `software stack`_ introduction page.
+
+
+Setting up the Host Machine and Syncing the software stack
+----------------------------------------------------------
+
+Host Machine requirements and the necessary steps to be followed to sync the
+software stack are listed on '`Download sources`_' page.
+
+
+Obtaining the RD-N2-Cfg2 FVP
+----------------------------
+
+The latest version of the RD-N2-Cfg2 fixed virtual platform (FVP) can be
+downloaded from the `Arm Ecosystem FVPs`_ page. On this page, navigate to
+"Neoverse Infrastructure FVPs" section to download the RD-N2-Cfg2 platform
+FVP installer.
+
+Follow the instructions of the installer and setup the FVP. The installer, by
+default, selects the home directory to install the FVP. To opt for different
+directory than the one selected by the installer, provide an absolute path to
+that directory when prompted for during the FVP installation process.
+
+
+Supported Features by RD-N2-Cfg2 platform software stack
+--------------------------------------------------------
+
+RD-N2-Cfg2 platform software stack supports the following features.
+
+- `Busybox Boot`_.
+- `Buildroot Boot`_
+- `Linux Distribution Boot`_.
+
+Follow the links above for detailed information about the build and execute
+steps for each of the supported features.
+
+
+Release Tags
+------------
+
+Table below lists the release tags for the RD-N2-Cfg2 platform software stack
+and the corresponding RD-N2-Cfg2 FVP version that is recommended to be used
+along with the listed release tag. The summary of the changes introduced and
+tests validated in each release is listed in release note for the tags listed
+below.
+
++--------------------------+------------------------------+
+|     Release Tag          |    RD-N2-Cfg2 FVP Version    |
++==========================+==============================+
+|  `RD-INFRA-2021.09.17`_  |           11.15.26           |
++--------------------------+------------------------------+
+
+--------------
+
+*Copyright (c) 2021, Arm Limited. All rights reserved.*
+
+
+.. _RD-N2: docs/infra/rdn2/readme.rst
+.. _Arm Ecosystem FVPs: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
+.. _Busybox Boot: docs/infra/common/busybox-boot.rst
+.. _Buildroot Boot: docs/infra/common/buildroot-boot.rst
+.. _Linux Distribution Boot: docs/infra/common/distro-boot.rst
+.. _Download sources: docs/infra/common/download-sources.rst
+.. _change log: docs/infra/change-log.rst
+.. _software stack: docs/infra/common/software-stack.rst
+.. _RD-INFRA-2021.09.17: docs/infra/releases/RD-INFRA-2021.09.17/release_note.rst

docs/infra/readme.rst

@@ -21,6 +21,7 @@ platforms is available for the following reference design platforms.
 
 - `RD-N2`_
 - `RD-N2-Cfg1`_
+- `RD-N2-Cfg2 (quad chip)`_
 - `RD-V1 (single chip)`_
 - `RD-V1 (quad chip)`_
 - `RD-N1-Edge (single chip)`_
@@ -46,6 +47,7 @@ page.
 
 .. _RD-N2: docs/infra/rdn2
 .. _RD-N2-Cfg1: docs/infra/rdn2cfg1
+.. _RD-N2-Cfg2 (quad chip): docs/infra/rdn2cfg2
 .. _RD-V1 (single chip): docs/infra/rdv1
 .. _RD-V1 (quad chip): docs/infra/rdv1mc
 .. _RD-N1-Edge (single chip): docs/infra/rdn1edge