Commit 293a69c8 authored by Lokesh B V's avatar Lokesh B V Committed by Thomas Abraham
Browse files

platform/rddaniel: add model parmeters to bypass TZC



By default, TZC blocks all the accesses to DRAM. So setup the model
parameters required to bypass the TZC for all memory accesses. This
patch should be reverted when firmware (tf-a) supports the required
configuration for TZC during boot.

Change-Id: Ieebb67f741fe5fa2e1096b6249aff1ae27c126cf
Signed-off-by: Lokesh B V's avatarLokesh B V <lokesh.bv@arm.com>
parent 96d1b2da
......@@ -249,6 +249,21 @@ echo
${MODEL} --version
export FASTSIM_CMN600_INTERNAL_RNSAM=1
TZC_BYPASS_PARAMS=" \
-C css.mem.tzc0.tzc400.rst_gate_keeper=0x0f \
-C css.mem.tzc0.tzc400.rst_region_attributes_0=0xc000000f \
-C css.mem.tzc0.tzc400.rst_region_id_access_0=0xffffffff \
-C css.mem.tzc1.tzc400.rst_gate_keeper=0x0f \
-C css.mem.tzc1.tzc400.rst_region_attributes_0=0xc000000f \
-C css.mem.tzc1.tzc400.rst_region_id_access_0=0xffffffff \
-C css.mem.tzc2.tzc400.rst_gate_keeper=0x0f \
-C css.mem.tzc2.tzc400.rst_region_attributes_0=0xc000000f \
-C css.mem.tzc2.tzc400.rst_region_id_access_0=0xffffffff \
-C css.mem.tzc3.tzc400.rst_gate_keeper=0x0f \
-C css.mem.tzc3.tzc400.rst_region_attributes_0=0xc000000f \
-C css.mem.tzc3.tzc400.rst_region_id_access_0=0xffffffff \
"
PARAMS="-C css.cmn_rhodes.mesh_config_file=$PATH_TO_MODEL/rhodes_daniel_cfgm.yml \
-C css.cmn_rhodes.force_on_from_start=1 \
--data css.scp.armcortexm7ct=$OUTDIR/scp_ramfw.bin@0x0BD80000 \
......@@ -270,6 +285,7 @@ PARAMS="-C css.cmn_rhodes.mesh_config_file=$PATH_TO_MODEL/rhodes_daniel_cfgm.yml
-C soc.pl011_uart1.unbuffered_output=1 \
-C css.pl011_uart_ap.unbuffered_output=1 \
${MODEL_PARAMS} \
${TZC_BYPASS_PARAMS} \
${EXTRA_MODEL_PARAMS}"
if [ "$AUTOMATE" == "true" ] ; then
......
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