Commit 6e19bd56 authored by Alexei Fedorov's avatar Alexei Fedorov
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TF-A GICv3 driver: Separate GICD and GICR accessor functions



This patch provides separation of GICD, GICR accessor
functions and adds new macros for GICv3 registers access
as a preparation for GICv3.1 and GICv4 support.
NOTE: Platforms need to modify to include both
'gicdv3_helpers.c' and 'gicrv3_helpers.c' instead of the
single helper file previously.

Change-Id: I1641bd6d217d6eb7d1228be3c4177b2d556da60a
Signed-off-by: Alexei Fedorov's avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
parent 65012c08
/*
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdint.h>
#include "gicv3_private.h"
/*******************************************************************************
* GIC Distributor interface accessors for bit operations
******************************************************************************/
/*
* Accessor to read the GIC Distributor IGRPMODR corresponding to the
* interrupt `id`, 32 interrupt IDs at a time.
*/
uint32_t gicd_read_igrpmodr(uintptr_t base, unsigned int id)
{
return GICD_READ(IGRPMODR, base, id);
}
/*
* Accessor to write the GIC Distributor IGRPMODR corresponding to the
* interrupt `id`, 32 interrupt IDs at a time.
*/
void gicd_write_igrpmodr(uintptr_t base, unsigned int id, uint32_t val)
{
GICD_WRITE(IGRPMODR, base, id, val);
}
/*
* Accessor to get the bit corresponding to interrupt ID
* in GIC Distributor IGRPMODR.
*/
unsigned int gicd_get_igrpmodr(uintptr_t base, unsigned int id)
{
return GICD_GET_BIT(IGRPMODR, base, id);
}
/*
* Accessor to set the bit corresponding to interrupt ID
* in GIC Distributor IGRPMODR.
*/
void gicd_set_igrpmodr(uintptr_t base, unsigned int id)
{
GICD_SET_BIT(IGRPMODR, base, id);
}
/*
* Accessor to clear the bit corresponding to interrupt ID
* in GIC Distributor IGRPMODR.
*/
void gicd_clr_igrpmodr(uintptr_t base, unsigned int id)
{
GICD_CLR_BIT(IGRPMODR, base, id);
}
/*
* Copyright (c) 2015-2020, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch.h>
#include <arch_helpers.h>
#include <common/debug.h>
#include <common/interrupt_props.h>
#include <drivers/arm/gicv3.h>
#include "gicv3_private.h"
/*******************************************************************************
* GIC Redistributor functions
* Note: The raw register values correspond to multiple interrupt IDs and
* the number of interrupt IDs involved depends on the register accessed.
******************************************************************************/
/*
* Accessor to read the GIC Redistributor IPRIORITYR corresponding to the
* interrupt `id`, 4 interrupts IDs at a time.
*/
unsigned int gicr_read_ipriorityr(uintptr_t base, unsigned int id)
{
unsigned int n = id >> IPRIORITYR_SHIFT;
return mmio_read_32(base + GICR_IPRIORITYR + (n << 2));
}
/*
* Accessor to write the GIC Redistributor IPRIORITYR corresponding to the
* interrupt `id`, 4 interrupts IDs at a time.
*/
void gicr_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val)
{
unsigned int n = id >> IPRIORITYR_SHIFT;
mmio_write_32(base + GICR_IPRIORITYR + (n << 2), val);
}
/*
* Accessor to set the byte corresponding to interrupt ID
* in GIC Redistributor IPRIORITYR.
*/
void gicr_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri)
{
GICR_WRITE_8(IPRIORITYR, base, id, pri & GIC_PRI_MASK);
}
/*
* Accessor to get the bit corresponding to interrupt ID
* from GIC Redistributor IGROUPR0.
*/
unsigned int gicr_get_igroupr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igroupr0(base);
return (reg_val >> bit_num) & 0x1U;
}
/*
* Accessor to set the bit corresponding to interrupt ID
* in GIC Redistributor IGROUPR0.
*/
void gicr_set_igroupr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igroupr0(base);
gicr_write_igroupr0(base, reg_val | (1U << bit_num));
}
/*
* Accessor to clear the bit corresponding to interrupt ID
* in GIC Redistributor IGROUPR0.
*/
void gicr_clr_igroupr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igroupr0(base);
gicr_write_igroupr0(base, reg_val & ~(1U << bit_num));
}
/*
* Accessor to get the bit corresponding to interrupt ID
* from GIC Redistributor IGRPMODR0.
*/
unsigned int gicr_get_igrpmodr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igrpmodr0(base);
return (reg_val >> bit_num) & 0x1U;
}
/*
* Accessor to set the bit corresponding to interrupt ID
* in GIC Redistributor IGRPMODR0.
*/
void gicr_set_igrpmodr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igrpmodr0(base);
gicr_write_igrpmodr0(base, reg_val | (1U << bit_num));
}
/*
* Accessor to clear the bit corresponding to interrupt ID
* in GIC Redistributor IGRPMODR0.
*/
void gicr_clr_igrpmodr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igrpmodr0(base);
gicr_write_igrpmodr0(base, reg_val & ~(1U << bit_num));
}
/*
* Accessor to set the bit corresponding to interrupt ID
* in GIC Redistributor ISENABLER0.
*/
void gicr_set_isenabler0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << ISENABLER_SHIFT) - 1U);
gicr_write_isenabler0(base, (1U << bit_num));
}
/*
* Accessor to set the bit corresponding to interrupt ID in GIC Redistributor
* ICENABLER0.
*/
void gicr_set_icenabler0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << ICENABLER_SHIFT) - 1U);
gicr_write_icenabler0(base, (1U << bit_num));
}
/*
* Accessor to set the bit corresponding to interrupt ID in GIC Redistributor
* ISACTIVER0.
*/
unsigned int gicr_get_isactiver0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << ISACTIVER_SHIFT) - 1U);
unsigned int reg_val = gicr_read_isactiver0(base);
return (reg_val >> bit_num) & 0x1U;
}
/*
* Accessor to clear the bit corresponding to interrupt ID in GIC Redistributor
* ICPENDRR0.
*/
void gicr_set_icpendr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << ICPENDR_SHIFT) - 1U);
gicr_write_icpendr0(base, (1U << bit_num));
}
/*
* Accessor to set the bit corresponding to interrupt ID in GIC Redistributor
* ISPENDR0.
*/
void gicr_set_ispendr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << ISPENDR_SHIFT) - 1U);
gicr_write_ispendr0(base, (1U << bit_num));
}
/*
* Accessor to set the bit fields corresponding to interrupt ID
* in GIC Redistributor ICFGR0.
*/
void gicr_set_icfgr0(uintptr_t base, unsigned int id, unsigned int cfg)
{
/* Interrupt configuration is a 2-bit field */
unsigned int bit_num = id & ((1U << ICFGR_SHIFT) - 1U);
unsigned int bit_shift = bit_num << 1U;
uint32_t reg_val = gicr_read_icfgr0(base);
/* Clear the field, and insert required configuration */
reg_val &= ~(GIC_CFG_MASK << bit_shift);
reg_val |= ((cfg & GIC_CFG_MASK) << bit_shift);
gicr_write_icfgr0(base, reg_val);
}
/*
* Accessor to set the bit fields corresponding to interrupt ID
* in GIC Redistributor ICFGR1.
*/
void gicr_set_icfgr1(uintptr_t base, unsigned int id, unsigned int cfg)
{
/* Interrupt configuration is a 2-bit field */
unsigned int bit_num = id & ((1U << ICFGR_SHIFT) - 1U);
unsigned int bit_shift = bit_num << 1U;
uint32_t reg_val = gicr_read_icfgr1(base);
/* Clear the field, and insert required configuration */
reg_val &= ~(GIC_CFG_MASK << bit_shift);
reg_val |= ((cfg & GIC_CFG_MASK) << bit_shift);
gicr_write_icfgr1(base, reg_val);
}
......@@ -15,263 +15,6 @@
#include "../common/gic_common_private.h"
#include "gicv3_private.h"
/*
* Accessor to read the GIC Distributor IGRPMODR corresponding to the
* interrupt `id`, 32 interrupt IDs at a time.
*/
unsigned int gicd_read_igrpmodr(uintptr_t base, unsigned int id)
{
unsigned int n = id >> IGRPMODR_SHIFT;
return mmio_read_32(base + GICD_IGRPMODR + (n << 2));
}
/*
* Accessor to write the GIC Distributor IGRPMODR corresponding to the
* interrupt `id`, 32 interrupt IDs at a time.
*/
void gicd_write_igrpmodr(uintptr_t base, unsigned int id, unsigned int val)
{
unsigned int n = id >> IGRPMODR_SHIFT;
mmio_write_32(base + GICD_IGRPMODR + (n << 2), val);
}
/*
* Accessor to get the bit corresponding to interrupt ID
* in GIC Distributor IGRPMODR.
*/
unsigned int gicd_get_igrpmodr(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
unsigned int reg_val = gicd_read_igrpmodr(base, id);
return (reg_val >> bit_num) & 0x1U;
}
/*
* Accessor to set the bit corresponding to interrupt ID
* in GIC Distributor IGRPMODR.
*/
void gicd_set_igrpmodr(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
unsigned int reg_val = gicd_read_igrpmodr(base, id);
gicd_write_igrpmodr(base, id, reg_val | (1U << bit_num));
}
/*
* Accessor to clear the bit corresponding to interrupt ID
* in GIC Distributor IGRPMODR.
*/
void gicd_clr_igrpmodr(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
unsigned int reg_val = gicd_read_igrpmodr(base, id);
gicd_write_igrpmodr(base, id, reg_val & ~(1U << bit_num));
}
/*
* Accessor to read the GIC Re-distributor IPRIORITYR corresponding to the
* interrupt `id`, 4 interrupts IDs at a time.
*/
unsigned int gicr_read_ipriorityr(uintptr_t base, unsigned int id)
{
unsigned int n = id >> IPRIORITYR_SHIFT;
return mmio_read_32(base + GICR_IPRIORITYR + (n << 2));
}
/*
* Accessor to write the GIC Re-distributor IPRIORITYR corresponding to the
* interrupt `id`, 4 interrupts IDs at a time.
*/
void gicr_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val)
{
unsigned int n = id >> IPRIORITYR_SHIFT;
mmio_write_32(base + GICR_IPRIORITYR + (n << 2), val);
}
/*
* Accessor to get the bit corresponding to interrupt ID
* from GIC Re-distributor IGROUPR0.
*/
unsigned int gicr_get_igroupr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igroupr0(base);
return (reg_val >> bit_num) & 0x1U;
}
/*
* Accessor to set the bit corresponding to interrupt ID
* in GIC Re-distributor IGROUPR0.
*/
void gicr_set_igroupr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igroupr0(base);
gicr_write_igroupr0(base, reg_val | (1U << bit_num));
}
/*
* Accessor to clear the bit corresponding to interrupt ID
* in GIC Re-distributor IGROUPR0.
*/
void gicr_clr_igroupr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igroupr0(base);
gicr_write_igroupr0(base, reg_val & ~(1U << bit_num));
}
/*
* Accessor to get the bit corresponding to interrupt ID
* from GIC Re-distributor IGRPMODR0.
*/
unsigned int gicr_get_igrpmodr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igrpmodr0(base);
return (reg_val >> bit_num) & 0x1U;
}
/*
* Accessor to set the bit corresponding to interrupt ID
* in GIC Re-distributor IGRPMODR0.
*/
void gicr_set_igrpmodr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igrpmodr0(base);
gicr_write_igrpmodr0(base, reg_val | (1U << bit_num));
}
/*
* Accessor to clear the bit corresponding to interrupt ID
* in GIC Re-distributor IGRPMODR0.
*/
void gicr_clr_igrpmodr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << IGRPMODR_SHIFT) - 1U);
unsigned int reg_val = gicr_read_igrpmodr0(base);
gicr_write_igrpmodr0(base, reg_val & ~(1U << bit_num));
}
/*
* Accessor to set the bit corresponding to interrupt ID
* in GIC Re-distributor ISENABLER0.
*/
void gicr_set_isenabler0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << ISENABLER_SHIFT) - 1U);
gicr_write_isenabler0(base, (1U << bit_num));
}
/*
* Accessor to set the bit corresponding to interrupt ID in GIC Re-distributor
* ICENABLER0.
*/
void gicr_set_icenabler0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << ICENABLER_SHIFT) - 1U);
gicr_write_icenabler0(base, (1U << bit_num));
}
/*
* Accessor to set the bit corresponding to interrupt ID in GIC Re-distributor
* ISACTIVER0.
*/
unsigned int gicr_get_isactiver0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << ISACTIVER_SHIFT) - 1U);
unsigned int reg_val = gicr_read_isactiver0(base);
return (reg_val >> bit_num) & 0x1U;
}
/*
* Accessor to clear the bit corresponding to interrupt ID in GIC Re-distributor
* ICPENDRR0.
*/
void gicr_set_icpendr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << ICPENDR_SHIFT) - 1U);
gicr_write_icpendr0(base, (1U << bit_num));
}
/*
* Accessor to set the bit corresponding to interrupt ID in GIC Re-distributor
* ISPENDR0.
*/
void gicr_set_ispendr0(uintptr_t base, unsigned int id)
{
unsigned int bit_num = id & ((1U << ISPENDR_SHIFT) - 1U);
gicr_write_ispendr0(base, (1U << bit_num));
}
/*
* Accessor to set the byte corresponding to interrupt ID
* in GIC Re-distributor IPRIORITYR.
*/
void gicr_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri)
{
uint8_t val = pri & GIC_PRI_MASK;
mmio_write_8(base + GICR_IPRIORITYR + id, val);
}
/*
* Accessor to set the bit fields corresponding to interrupt ID
* in GIC Re-distributor ICFGR0.
*/
void gicr_set_icfgr0(uintptr_t base, unsigned int id, unsigned int cfg)
{
/* Interrupt configuration is a 2-bit field */
unsigned int bit_num = id & ((1U << ICFGR_SHIFT) - 1U);
unsigned int bit_shift = bit_num << 1U;
uint32_t reg_val = gicr_read_icfgr0(base);
/* Clear the field, and insert required configuration */
reg_val &= ~(GIC_CFG_MASK << bit_shift);
reg_val |= ((cfg & GIC_CFG_MASK) << bit_shift);
gicr_write_icfgr0(base, reg_val);
}
/*
* Accessor to set the bit fields corresponding to interrupt ID
* in GIC Re-distributor ICFGR1.
*/
void gicr_set_icfgr1(uintptr_t base, unsigned int id, unsigned int cfg)
{
/* Interrupt configuration is a 2-bit field */
unsigned int bit_num = id & ((1U << ICFGR_SHIFT) - 1U);
unsigned int bit_shift = bit_num << 1U;
uint32_t reg_val = gicr_read_icfgr1(base);
/* Clear the field, and insert required configuration */
reg_val &= ~(GIC_CFG_MASK << bit_shift);
reg_val |= ((cfg & GIC_CFG_MASK) << bit_shift);
gicr_write_icfgr1(base, reg_val);
}
/******************************************************************************
* This function marks the core as awake in the re-distributor and
* ensures that the interface is active.
......@@ -292,7 +35,6 @@ void gicv3_rdistif_mark_core_awake(uintptr_t gicr_base)
;
}
/******************************************************************************
* This function marks the core as asleep in the re-distributor and ensures
* that the interface is quiescent.
......
/*
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -24,6 +24,100 @@
#define RWP_TRUE U(1)
#define RWP_FALSE U(0)
/* Calculate GIC register bit number corresponding to its interrupt ID */
#define BIT_NUM(REG, id) \
((id) & ((1U << REG##_SHIFT) - 1U))
/* Calculate 8-bit GICD register offset corresponding to its interrupt ID */
#define GICD_OFFSET_8(REG, id) \
GICD_##REG + (id)
/* Calculate 32-bit GICD register offset corresponding to its interrupt ID */
#define GICD_OFFSET(REG, id) \
GICD_##REG + (((id) >> REG##_SHIFT) << 2)
/* Calculate 64-bit GICD register offset corresponding to its interrupt ID */
#define GICD_OFFSET_64(REG, id) \
GICD_##REG + (((id) >> REG##_SHIFT) << 3)
/* Read 32-bit GIC Distributor register corresponding to its interrupt ID */
#define GICD_READ(REG, base, id) \
mmio_read_32((base) + GICD_OFFSET(REG, (id)))
/* Read 64-bit GIC Distributor register corresponding to its interrupt ID */
#define GICD_READ_64(REG, base, id) \
mmio_read_64((base) + GICD_OFFSET_64(REG, (id)))
/* Write to 64-bit GIC Distributor register corresponding to its interrupt ID */
#define GICD_WRITE_64(REG, base, id, val) \
mmio_write_64((base) + GICD_OFFSET_64(REG, (id)), (val))
/* Write to 32-bit GIC Distributor register corresponding to its interrupt ID */
#define GICD_WRITE(REG, base, id, val) \
mmio_write_32((base) + GICD_OFFSET(REG, (id)), (val))
/* Write to 8-bit GIC Distributor register corresponding to its interrupt ID */
#define GICD_WRITE_8(REG, base, id, val) \
mmio_write_8((base) + GICD_OFFSET_8(REG, (id)), (val))
/*
* Bit operations on GIC Distributor register corresponding
* to its interrupt ID
*/
/* Get bit in GIC Distributor register */
#define GICD_GET_BIT(REG, base, id) \
((mmio_read_32((base) + GICD_OFFSET(REG, (id))) >> \
BIT_NUM(REG, (id))) & 1U)
/* Set bit in GIC Distributor register */
#define GICD_SET_BIT(REG, base, id) \
mmio_setbits_32((base) + GICD_OFFSET(REG, (id)), \
((uint32_t)1 << BIT_NUM(REG, (id))))
/* Clear bit in GIC Distributor register */
#define GICD_CLR_BIT(REG, base, id) \
mmio_clrbits_32((base) + GICD_OFFSET(REG, (id)), \
((uint32_t)1 << BIT_NUM(REG, (id))))