Commit 8709c939 authored by elly.chiang's avatar elly.chiang Committed by Manish Pandey
Browse files

mediatek: mt8192: add ptp3 driver



enable PTP3 for protecting sysPi
Signed-off-by: default avatarelly.chiang <elly.chiang@mediatek.com>
Change-Id: Ic3a13c8314f829dca8547861b98639d1d9444eb2
parent 189f038f
/*
* Copyright (c) 2020, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef MTK_PTP3_H
#define MTK_PTP3_H
#include <lib/mmio.h>
#include <lib/utils_def.h>
/************************************************
* BIT Operation and REG r/w
************************************************/
#define ptp3_read(addr) mmio_read_32((uintptr_t)addr)
#define ptp3_write(addr, val) mmio_write_32((uintptr_t)addr, val)
/************************************************
* CPU info
************************************************/
#define NR_PTP3_CFG1_CPU U(8)
#define PTP3_CFG1_CPU_START_ID U(0)
#define PTP3_CFG1_MASK 0x00100000
#define NR_PTP3_CFG2_CPU U(4)
#define PTP3_CFG2_CPU_START_ID U(4)
#define NR_PTP3_CFG3_CPU U(4)
#define PTP3_CFG3_CPU_START_ID U(4)
/************************************************
* config enum
************************************************/
enum PTP3_CFG {
PTP3_CFG_ADDR,
PTP3_CFG_VALUE,
NR_PTP3_CFG,
};
/************************************
* prototype
************************************/
/* init trigger for ptp3 feature */
extern void ptp3_init(unsigned int core);
extern void ptp3_deinit(unsigned int core);
#endif /* MTK_PTP3_H */
/*
* Copyright (c) 2020, MediaTek Inc. All rights reserved. \
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include "mtk_ptp3_common.h"
/************************************************
* Central control: turn on sysPi protection
************************************************/
static unsigned int ptp3_cfg1[NR_PTP3_CFG1_CPU][NR_PTP3_CFG] = {
{0x0C530610, 0x110842},
{0x0C530E10, 0x110842},
{0x0C531610, 0x110842},
{0x0C531E10, 0x110842},
{0x0C532610, 0x110842},
{0x0C532E10, 0x110842},
{0x0C533610, 0x110842},
{0x0C533E10, 0x110842}
};
static unsigned int ptp3_cfg2[NR_PTP3_CFG2_CPU][NR_PTP3_CFG] = {
{0x0C53B830, 0x68000},
{0x0C53BA30, 0x68000},
{0x0C53BC30, 0x68000},
{0x0C53BE30, 0x68000}
};
static unsigned int ptp3_cfg3[NR_PTP3_CFG3_CPU][NR_PTP3_CFG] = {
{0x0C532480, 0x7C607C6},
{0x0C532C80, 0x7C607C6},
{0x0C533480, 0x7C607C6},
{0x0C533C80, 0x7C607C6}
};
/************************************************
* API
************************************************/
void ptp3_init(unsigned int core)
{
unsigned int _core;
if (core >= PTP3_CFG1_CPU_START_ID) {
if (core < NR_PTP3_CFG1_CPU) {
/* update ptp3_cfg1 */
ptp3_write(
ptp3_cfg1[core][PTP3_CFG_ADDR],
ptp3_cfg1[core][PTP3_CFG_VALUE]);
}
}
if (core >= PTP3_CFG2_CPU_START_ID) {
_core = core - PTP3_CFG2_CPU_START_ID;
if (_core < NR_PTP3_CFG2_CPU) {
/* update ptp3_cfg2 */
ptp3_write(
ptp3_cfg2[_core][PTP3_CFG_ADDR],
ptp3_cfg2[_core][PTP3_CFG_VALUE]);
}
}
if (core >= PTP3_CFG3_CPU_START_ID) {
_core = core - PTP3_CFG3_CPU_START_ID;
if (_core < NR_PTP3_CFG3_CPU) {
/* update ptp3_cfg3 */
ptp3_write(
ptp3_cfg3[_core][PTP3_CFG_ADDR],
ptp3_cfg3[_core][PTP3_CFG_VALUE]);
}
}
}
void ptp3_deinit(unsigned int core)
{
if (core >= PTP3_CFG1_CPU_START_ID) {
if (core < NR_PTP3_CFG1_CPU) {
/* update ptp3_cfg1 */
ptp3_write(
ptp3_cfg1[core][PTP3_CFG_ADDR],
ptp3_cfg1[core][PTP3_CFG_VALUE] &
~PTP3_CFG1_MASK);
}
}
}
......@@ -14,6 +14,7 @@
/* platform specific headers */
#include <mt_gic_v3.h>
#include <mtk_ptp3_common.h>
#include <mtspmc.h>
#include <plat/common/platform.h>
#include <plat_mtk_lpm.h>
......@@ -72,6 +73,8 @@ static void plat_cpu_pwrdwn_common(unsigned int cpu,
mt_gic_rdistif_save();
gicv3_cpuif_disable(cpu);
gicv3_rdistif_off(cpu);
/* PTP3 config */
ptp3_deinit(cpu);
}
static void plat_cpu_pwron_common(unsigned int cpu,
......@@ -97,6 +100,9 @@ static void plat_cpu_pwron_common(unsigned int cpu,
} else {
mt_gic_rdistif_restore();
}
/* PTP3 config */
ptp3_init(cpu);
}
/*
......
......@@ -13,6 +13,7 @@ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT_SOC}/drivers/gpio/ \
-I${MTK_PLAT_SOC}/drivers/mcdi/ \
-I${MTK_PLAT_SOC}/drivers/pmic/ \
-I${MTK_PLAT_SOC}/drivers/ptp3/ \
-I${MTK_PLAT_SOC}/drivers/spmc/ \
-I${MTK_PLAT_SOC}/drivers/timer/ \
-I${MTK_PLAT_SOC}/drivers/uart/
......@@ -53,6 +54,7 @@ BL31_SOURCES += common/desc_image_load.c \
${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm.c \
${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c \
${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c \
${MTK_PLAT_SOC}/drivers/ptp3/mtk_ptp3_main.c \
${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c \
${MTK_PLAT_SOC}/drivers/timer/mt_timer.c
......
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