Commit d62fa4bc authored by Tejas Patel's avatar Tejas Patel Committed by Jolly Shah
Browse files

plat: xilinx: versal: Implement PM IOCTL API



Add PM IOCTL EEMI.

Below PLL related IOCTLs are not available in versal PLM.
	* IOCTL_SET_PLL_FRAC_MODE
	* IOCTL_GET_PLL_FRAC_MODE
	* IOCTL_SET_PLL_FRAC_DATA
	* IOCTL_SET_PLL_FRAC_DATA

PLM has new EEMI APIs for PLL related operations.
Call them instead of passing IOCTL API to PLM.
For other IOCTL, ATF just pass through IOCTL
request to PLM (Platform Loader and Manager).

Signed-off-by: default avatarTejas Patel <tejas.patel@xilinx.com>
Signed-off-by: default avatarJolly Shah <jolly.shah@xilinx.com>
Change-Id: I96f8da46a4d3965c9291b7b2da96056408137839
parent ffecfe79
......@@ -612,3 +612,37 @@ enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype)
return pm_ipi_send_non_blocking(primary_proc, payload);
}
/**
* pm_api_ioctl() - PM IOCTL API for device control and configs
* @device_id Device ID
* @ioctl_id ID of the requested IOCTL
* @arg1 Argument 1 to requested IOCTL call
* @arg2 Argument 2 to requested IOCTL call
* @value Returned output value
*
* This function calls IOCTL to firmware for device control and configuration.
*
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_api_ioctl(uint32_t device_id, uint32_t ioctl_id,
uint32_t arg1, uint32_t arg2, uint32_t *value)
{
uint32_t payload[PAYLOAD_ARG_CNT];
switch (ioctl_id) {
case IOCTL_SET_PLL_FRAC_MODE:
return pm_pll_set_mode(arg1, arg2);
case IOCTL_GET_PLL_FRAC_MODE:
return pm_pll_get_mode(arg1, value);
case IOCTL_SET_PLL_FRAC_DATA:
return pm_pll_set_param(arg1, PM_PLL_PARAM_DATA, arg2);
case IOCTL_GET_PLL_FRAC_DATA:
return pm_pll_get_param(arg1, PM_PLL_PARAM_DATA, value);
default:
/* Send request to the PMC */
PM_PACK_PAYLOAD5(payload, LIBPM_MODULE_ID, PM_IOCTL, device_id,
ioctl_id, arg1, arg2);
return pm_ipi_send_sync(primary_proc, payload, value, 1);
}
}
......@@ -55,5 +55,7 @@ enum pm_ret_status pm_pll_set_mode(uint32_t clk_id, uint32_t mode);
enum pm_ret_status pm_pll_get_mode(uint32_t clk_id, uint32_t *mode);
enum pm_ret_status pm_force_powerdown(uint32_t target, uint8_t ack);
enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype);
enum pm_ret_status pm_api_ioctl(uint32_t device_id, uint32_t ioctl_id,
uint32_t arg1, uint32_t arg2, uint32_t *value);
#endif /* PM_API_SYS_H */
......@@ -41,6 +41,7 @@
#define PM_PINCTRL_SET_FUNCTION 31U
#define PM_PINCTRL_CONFIG_PARAM_GET 32U
#define PM_PINCTRL_CONFIG_PARAM_SET 33U
#define PM_IOCTL 34U
#define PM_CLOCK_ENABLE 36U
#define PM_CLOCK_DISABLE 37U
#define PM_CLOCK_GETSTATE 38U
......@@ -55,6 +56,16 @@
#define PM_PLL_SET_MODE 50U
#define PM_PLL_GET_MODE 51U
/* IOCTL IDs for clock driver */
#define IOCTL_SET_PLL_FRAC_MODE 8
#define IOCTL_GET_PLL_FRAC_MODE 9
#define IOCTL_SET_PLL_FRAC_DATA 10
#define IOCTL_GET_PLL_FRAC_DATA 11
/* Parameter ID for PLL IOCTLs */
/* Fractional data portion for PLL */
#define PM_PLL_PARAM_DATA 2
/*********************************************************************
* Enum definitions
********************************************************************/
......
......@@ -182,6 +182,15 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
ret = pm_pinctrl_set_pin_param(pm_arg[0], pm_arg[1], pm_arg[2]);
SMC_RET1(handle, (uint64_t)ret);
case PM_IOCTL:
{
uint32_t value;
ret = pm_api_ioctl(pm_arg[0], pm_arg[1], pm_arg[2],
pm_arg[3], &value);
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
}
case PM_CLOCK_ENABLE:
ret = pm_clock_enable(pm_arg[0]);
SMC_RET1(handle, (uint64_t)ret);
......
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