1. 09 Oct, 2019 1 commit
    • Paul Beesley's avatar
      doc: Formatting fixes for readme.rst · 76cf653b
      Paul Beesley authored
      
      
      The readme.rst file in the project root is the front-page that
      is displayed on Github and if viewing the TF-A repository on
      git.trustedfirmware.org in the "about" view. It now contains a
      small amount of stub content, and directs readers to the
      ReadTheDocs documentation via trustedfirmware.org/docs/tf-a.
      
      The Github renderer is displaying the content fine but the cgit
      viewer displays some "backlink" errors because some content
      substitutions were left in place (terms surrounded by pipe
      symbols), e.g. |TF-A|.
      
      This patch removes those substitutions, that are not supported
      by cgit, and also updates one heading to clarify where to find
      the new docs.
      
      Change-Id: I358451df45b8c99975ba0b6db8ea61253a10560d
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      76cf653b
  2. 08 Oct, 2019 1 commit
    • Paul Beesley's avatar
      doc: De-duplicate readme and license files · 8cc36aec
      Paul Beesley authored
      
      
      The readme.rst and license.rst files in the project root overlap
      with the index.rst and license.rst files in the docs/ folder. We
      need to use the latter when building the documentation, as Sphinx
      requires all included files to be under a common root. However,
      the files in the root are currently used by the cgit and Github
      viewers.
      
      Using symlinks in Git presents some difficulties so the best
      course of action is likely to leave these files but in stub form.
      
      The license.rst file in the root will simply tell the reader to
      refer to docs/license.rst.
      
      The readme.rst file will contain a small amount of content that
      is derived from the docs/index.rst file, so that the Github main
      page will have something valid to show, but it will also contain
      a link to the full documentation on ReadTheDocs.
      
      Change-Id: I6dc46f08777e8d7ecb32ca7afc07a28486c9f77a
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      8cc36aec
  3. 13 Sep, 2019 1 commit
    • Alexei Fedorov's avatar
      Refactor ARMv8.3 Pointer Authentication support code · ed108b56
      Alexei Fedorov authored
      
      
      This patch provides the following features and makes modifications
      listed below:
      - Individual APIAKey key generation for each CPU.
      - New key generation on every BL31 warm boot and TSP CPU On event.
      - Per-CPU storage of APIAKey added in percpu_data[]
        of cpu_data structure.
      - `plat_init_apiakey()` function replaced with `plat_init_apkey()`
        which returns 128-bit value and uses Generic timer physical counter
        value to increase the randomness of the generated key.
        The new function can be used for generation of all ARMv8.3-PAuth keys
      - ARMv8.3-PAuth specific code placed in `lib\extensions\pauth`.
      - New `pauth_init_enable_el1()` and `pauth_init_enable_el3()` functions
        generate, program and enable APIAKey_EL1 for EL1 and EL3 respectively;
        pauth_disable_el1()` and `pauth_disable_el3()` functions disable
        PAuth for EL1 and EL3 respectively;
        `pauth_load_bl31_apiakey()` loads saved per-CPU APIAKey_EL1 from
        cpu-data structure.
      - Combined `save_gp_pauth_registers()` function replaces calls to
        `save_gp_registers()` and `pauth_context_save()`;
        `restore_gp_pauth_registers()` replaces `pauth_context_restore()`
        and `restore_gp_registers()` calls.
      - `restore_gp_registers_eret()` function removed with corresponding
        code placed in `el3_exit()`.
      - Fixed the issue when `pauth_t pauth_ctx` structure allocated space
        for 12 uint64_t PAuth registers instead of 10 by removal of macro
        CTX_PACGAKEY_END from `include/lib/el3_runtime/aarch64/context.h`
        and assigning its value to CTX_PAUTH_REGS_END.
      - Use of MODE_SP_ELX and MODE_SP_EL0 macro definitions
        in `msr	spsel`  instruction instead of hard-coded values.
      - Changes in documentation related to ARMv8.3-PAuth and ARMv8.5-BTI.
      
      Change-Id: Id18b81cc46f52a783a7e6a09b9f149b6ce803211
      Signed-off-by: Alexei Fedorov's avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      ed108b56
  4. 10 Jul, 2019 1 commit
  5. 08 Jun, 2019 1 commit
  6. 03 Jun, 2019 1 commit
  7. 31 May, 2019 1 commit
  8. 28 May, 2019 1 commit
  9. 24 May, 2019 1 commit
  10. 20 May, 2019 1 commit
  11. 25 Apr, 2019 1 commit
  12. 12 Apr, 2019 1 commit
    • John Tsichritzis's avatar
      Improvements in Readme · 0668dd71
      John Tsichritzis authored
      
      
      - Fix broken link to the issue tracker.
      - Add contents section to make navigation easier throughout the page.
      - Move the link to documentation contents near the top. Where it was
        before could be missed and documentation might seem inaccessible.
      
      Change-Id: I502e4fc0fd312459cda351d30a8781c221625724
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      0668dd71
  13. 08 Apr, 2019 1 commit
  14. 02 Apr, 2019 2 commits
  15. 29 Mar, 2019 1 commit
  16. 28 Mar, 2019 1 commit
  17. 27 Mar, 2019 1 commit
  18. 12 Mar, 2019 2 commits
  19. 07 Mar, 2019 1 commit
  20. 27 Feb, 2019 2 commits
  21. 19 Feb, 2019 1 commit
  22. 17 Jan, 2019 1 commit
  23. 11 Jan, 2019 3 commits
  24. 26 Oct, 2018 1 commit
  25. 02 Oct, 2018 1 commit
  26. 21 Sep, 2018 1 commit
  27. 22 Aug, 2018 1 commit
  28. 31 Jul, 2018 1 commit
  29. 30 Jul, 2018 1 commit
  30. 21 Jun, 2018 1 commit
  31. 19 Jun, 2018 1 commit
    • Nishanth Menon's avatar
      ti: k3: Setup initial files for platform · 1841c533
      Nishanth Menon authored
      
      
      Create the baseline Makefile, platform definitions file and platform
      specific assembly macros file. This includes first set of constants
      for the platform including cache sizes and linker format and a stub for
      BL31 and the basic memory layout
      
      K3 SoC family of processors do not use require a BL1 or BL2 binary,
      since such functions are provided by an system controller on the SoC.
      This lowers the burden of ATF to purely managing the local ARM cores
      themselves.
      
      Signed-off-by: default avatarBenjamin Fair <b-fair@ti.com>
      Signed-off-by: default avatarNishanth Menon <nm@ti.com>
      Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
      1841c533
  32. 20 Mar, 2018 1 commit
  33. 19 Mar, 2018 1 commit
  34. 15 Mar, 2018 1 commit
  35. 17 Jul, 2017 1 commit