SCP-firmware merge requestshttps://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests2019-08-20T16:51:01Zhttps://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/102scmi: Remove unused declarations2019-08-20T16:51:01ZDarryl Greenscmi: Remove unused declarations*Created by: souvikkc*
Reemove unnecessary externs from SCMI module internal header files.
Change-Id: I6a74ba18db214b401fb8705606c46b32ead99003
Signed-off-by: Souvik Chakravarty <souvik.chakravarty@arm.com>*Created by: souvikkc*
Reemove unnecessary externs from SCMI module internal header files.
Change-Id: I6a74ba18db214b401fb8705606c46b32ead99003
Signed-off-by: Souvik Chakravarty <souvik.chakravarty@arm.com>https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/104Cmn600 fixes2019-09-03T16:11:46ZDarryl GreenCmn600 fixes*Created by: manojkumar-arm*
*Created by: manojkumar-arm*
https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/103Ensure system PLLs on Juno are locked within MCC timeout2019-09-11T12:23:11ZChris KayEnsure system PLLs on Juno are locked within MCC timeoutThe current approach to resetting the PLLs, which is to use a pre-main
constructor function, is not infallible - if we statically allocate
enough data, eventually the time it takes for the C runtime to
initialize exceeds the amount of...The current approach to resetting the PLLs, which is to use a pre-main
constructor function, is not infallible - if we statically allocate
enough data, eventually the time it takes for the C runtime to
initialize exceeds the amount of time that the motherboard
microcontroller gives us to ensure the system PLLs are locked.
The workaround for this is to instead wrap the core's reset handler.
This way we ensure that the PLLs have been reset before we do any time-
consuming work.https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/107doc: Update list of maintainers for SCP-firmware2019-09-12T11:01:41ZChris Kaydoc: Update list of maintainers for SCP-firmwareThis commit updates the maintainers documentation to reflect changes to
the project maintainership and review process.
It also adds a CODEOWNERS file, the format of which is defined by
GitHub, describing the same information.
Cha...This commit updates the maintainers documentation to reflect changes to
the project maintainership and review process.
It also adds a CODEOWNERS file, the format of which is defined by
GitHub, describing the same information.
Change-Id: Ibe631731b633eb0389efe1f122d8ca4308216926
Co-authored-by: Jim Quigley <jim.quigley@arm.com>
Signed-off-by: Chris Kay <chris.kay@arm.com>
Signed-off-by: Jim Quigley <jim.quigley@arm.com>https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/108doc: Fix broken maintainer links2019-09-12T13:00:36ZChris Kaydoc: Fix broken maintainer linksThis addresses an issue where maintainer usernames did not properly link
to their GitHub profiles.
Change-Id: I78f45044a319c643ab7cec062758ae16fd76626e
Signed-off-by: Chris Kay <chris.kay@arm.com>This addresses an issue where maintainer usernames did not properly link
to their GitHub profiles.
Change-Id: I78f45044a319c643ab7cec062758ae16fd76626e
Signed-off-by: Chris Kay <chris.kay@arm.com>https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/112module clock: minor cast, export, braces fixup2019-09-25T18:33:43ZDarryl Greenmodule clock: minor cast, export, braces fixup*Created by: etienne-lms*
Adds explicit casts where compiler reports issues.
Prevents module_ctx variable being exported outside the scope clock
module source file.
Adds braces around a conditioned a multi-line instruction block:...*Created by: etienne-lms*
Adds explicit casts where compiler reports issues.
Prevents module_ctx variable being exported outside the scope clock
module source file.
Adds braces around a conditioned a multi-line instruction block:
consider inline comment a part of the instruction block.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/110build: enhance entry guards in internal header files2019-09-25T18:34:22ZDarryl Greenbuild: enhance entry guards in internal header files*Created by: etienne-lms*
Add prefix INTERNAL_ to defined macro for internal header file.
This change prevents an internal/foo.h from obscuring generic
foo.h because former and later both guards from
#ifndef FOO_H
#define FOO_H
(...*Created by: etienne-lms*
Add prefix INTERNAL_ to defined macro for internal header file.
This change prevents an internal/foo.h from obscuring generic
foo.h because former and later both guards from
#ifndef FOO_H
#define FOO_H
(...)
#endif /*FOO_H*/
As internal/*.h are included with #include <internal/*.h>, INTERNAL_
looks a generic enough prefix.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/111Fix scmi & power_domain against `!BUILD_HAS_NOTIFICATION`2019-09-30T07:00:27ZDarryl GreenFix scmi & power_domain against `!BUILD_HAS_NOTIFICATION`*Created by: etienne-lms*
Fix build issue when !BUILD_HAS_NOTIFICATION.*Created by: etienne-lms*
Fix build issue when !BUILD_HAS_NOTIFICATION.https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/120n1sdp: add GEN4 support for CCIX root complex2019-10-11T14:26:08ZDarryl Greenn1sdp: add GEN4 support for CCIX root complex*Created by: manojkumar-arm*
This patch adds GEN4 link training support for CCIX root complex
to support GEN4 cards in CCIX slot on N1SDP platform.
Change-Id: I73fc76c1575326017599634747cd15c151f9e08c
Signed-off-by: Manoj Kumar <ma...*Created by: manojkumar-arm*
This patch adds GEN4 link training support for CCIX root complex
to support GEN4 cards in CCIX slot on N1SDP platform.
Change-Id: I73fc76c1575326017599634747cd15c151f9e08c
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/124sgi575_system: remove access to CPU_PPU_INT_STATUS[7..4] registers2019-10-16T10:07:03ZDarryl Greensgi575_system: remove access to CPU_PPU_INT_STATUS[7..4] registers*Created by: thomas-arm*
SGI-575 platform does not instantiate CPU_PPU_INT_STATUS[7..4]
registers. So remove access to these registers.
Change-Id: I5405bb378f6789bcc1e8470cabbee82c6daa4314
Signed-off-by: Thomas Abraham <thomas.abra...*Created by: thomas-arm*
SGI-575 platform does not instantiate CPU_PPU_INT_STATUS[7..4]
registers. So remove access to these registers.
Change-Id: I5405bb378f6789bcc1e8470cabbee82c6daa4314
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/126N1sdp/cmn600 multichip fixes2019-10-18T14:09:05ZDarryl GreenN1sdp/cmn600 multichip fixes*Created by: manojkumar-arm*
This patchset adds support for multichip operation in CMN-600 module.*Created by: manojkumar-arm*
This patchset adds support for multichip operation in CMN-600 module.https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/127N1sdp/c2c phase 12019-10-22T12:58:15ZDarryl GreenN1sdp/c2c phase 1*Created by: manojkumar-arm*
This patch set contains patches to enable multichip initialization with two N1SDP systems over CCIX link. Phase 1 performs CCIX initialization and exposes slave DDR memory to master CPUs. Slave core power-up...*Created by: manojkumar-arm*
This patch set contains patches to enable multichip initialization with two N1SDP systems over CCIX link. Phase 1 performs CCIX initialization and exposes slave DDR memory to master CPUs. Slave core power-up sequencing will be added in next patchset.https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/125n1sdp: introduce multichip information SDS region.2019-10-25T13:00:54ZDarryl Greenn1sdp: introduce multichip information SDS region.*Created by: manish-pandey-arm*
N1SDP can support multichip configuration wherein n1sdp boards are
connected over high speed coherent CCIX link, for now only dual-chip
is supported.
Multichip information can only be probed in SCP, ...*Created by: manish-pandey-arm*
N1SDP can support multichip configuration wherein n1sdp boards are
connected over high speed coherent CCIX link, for now only dual-chip
is supported.
Multichip information can only be probed in SCP, use SDS region to
propagate this information to TF-A.
This patch introduces a new SDS to store multichip information and a
place holder to update this information provided by C2C module which is
responsible for probing chip-to-chip information.
Currently it is configured as single-chip system but once C2C module is
added this information will be filled dynamically.
Change-Id: I57e4aac5c32aa22f927faac4a3f91876ef34dd23
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/128n1sdp: use single SDS for mem_info and multichip info2019-10-28T12:15:48ZDarryl Greenn1sdp: use single SDS for mem_info and multichip info*Created by: manish-pandey-arm*
Merge mem_info and multichip information into a single data structure
which will be passed on to TF-A.
This patch introduces a new SDS to store platform information, which
will be populated dynamical...*Created by: manish-pandey-arm*
Merge mem_info and multichip information into a single data structure
which will be passed on to TF-A.
This patch introduces a new SDS to store platform information, which
will be populated dynamically by SCP.
This structure holds following information:
- multichip_mode
- slave_count
- local_ddr_size
- remote_ddr_size
Change-Id: Ib71c1adabcaff227a22144fdb0b7eea28495cc2b
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/129N1sdp/c2c phase 22019-11-04T16:19:53ZDarryl GreenN1sdp/c2c phase 2*Created by: manojkumar-arm*
This second phase of patch set includes patches to enable SMP boot of multiple N1SDP chips over CCIX link. It includes the power domain handling of master and slave chips in single chip and multi chip use ca...*Created by: manojkumar-arm*
This second phase of patch set includes patches to enable SMP boot of multiple N1SDP chips over CCIX link. It includes the power domain handling of master and slave chips in single chip and multi chip use cases and also timer synchronization in multi chip use case.https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/113fwk_interrupt: add missing declaration of exported functions2019-11-06T12:01:20ZDarryl Greenfwk_interrupt: add missing declaration of exported functions*Created by: etienne-lms*
Add missing declaration of exported function fwk_interrupt_init()
and fwk_interrupt_set_isr_fault().
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>*Created by: etienne-lms*
Add missing declaration of exported function fwk_interrupt_init()
and fwk_interrupt_set_isr_fault().
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/114log: discard non standard %e format2019-11-07T10:42:09ZDarryl Greenlog: discard non standard %e format*Created by: etienne-lms*
Prior this change was %e a valid format for printing error codes as
strings when identified. This change removes such support and replace
use of %e with use of standard format identifier and a error code
to ...*Created by: etienne-lms*
Prior this change was %e a valid format for printing error codes as
strings when identified. This change removes such support and replace
use of %e with use of standard format identifier and a error code
to string conversion function.
With this change, any standard printf-like format comply with
SCP-firmware traces implementation. fwk_err2str() helps traces to get
nice string identifier for errors.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/135PSU bugfixes2019-11-07T18:30:38ZChris KayPSU bugfixesThis PR fixes a couple of bugs identified in the recent asynchronous PSU support.This PR fixes a couple of bugs identified in the recent asynchronous PSU support.https://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/123Clocks - handle deferred responses2019-11-08T12:02:37ZDarryl GreenClocks - handle deferred responses*Created by: nicola-mazzucato-arm*
This PR adds support to clock module and scmi_clock module for handling deferred requests*Created by: nicola-mazzucato-arm*
This PR adds support to clock module and scmi_clock module for handling deferred requestshttps://gitlab.arm.com/firmware/SCP-firmware/-/merge_requests/122Juno clock definitions2019-11-08T12:02:39ZDarryl GreenJuno clock definitions*Created by: nicola-mazzucato-arm*
This PR is to add required definitions for clocks for Juno.
It also adds support for printing uint64_t*Created by: nicola-mazzucato-arm*
This PR is to add required definitions for clocks for Juno.
It also adds support for printing uint64_t