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Fix issues with EL3/gic v2 configuration (tested on Cortex A53)

fsylvestre requested to merge fsy/renesas_fix_interrupts into main
  • Configure EL3 base vector address configuration as it is needed to correctly handle FIQ (when EL3 is supported), because FIQ are redirected to EL3.
  • Fix GICv2 GICC base address

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