i2c-mpc.c 23.3 KB
Newer Older
1
// SPDX-License-Identifier: GPL-2.0
Linus Torvalds's avatar
Linus Torvalds committed
2
3
4
5
6
/*
 * This is a combined i2c adapter and algorithm driver for the
 * MPC107/Tsi107 PowerPC northbridge and processors that include
 * the same I2C unit (8240, 8245, 85xx).
 *
7
8
 * Copyright (C) 2003-2004 Humboldt Solutions Ltd, adrian@humboldt.co.uk
 * Copyright (C) 2021 Allied Telesis Labs
Linus Torvalds's avatar
Linus Torvalds committed
9
10
11
12
 */

#include <linux/kernel.h>
#include <linux/module.h>
13
#include <linux/sched/signal.h>
14
15
#include <linux/of_address.h>
#include <linux/of_irq.h>
16
#include <linux/of_platform.h>
17
#include <linux/property.h>
18
#include <linux/slab.h>
19

20
#include <linux/clk.h>
21
#include <linux/io.h>
22
#include <linux/iopoll.h>
Linus Torvalds's avatar
Linus Torvalds committed
23
24
25
26
27
#include <linux/fsl_devices.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/delay.h>

28
#include <asm/mpc52xx.h>
29
#include <asm/mpc85xx.h>
30
31
#include <sysdev/fsl_soc.h>

32
33
#define DRV_NAME "mpc-i2c"

34
35
36
#define MPC_I2C_CLOCK_LEGACY   0
#define MPC_I2C_CLOCK_PRESERVE (~0U)

37
38
39
40
#define MPC_I2C_FDR   0x04
#define MPC_I2C_CR    0x08
#define MPC_I2C_SR    0x0c
#define MPC_I2C_DR    0x10
Linus Torvalds's avatar
Linus Torvalds committed
41
42
43
44
45
46
47
48
#define MPC_I2C_DFSRR 0x14

#define CCR_MEN  0x80
#define CCR_MIEN 0x40
#define CCR_MSTA 0x20
#define CCR_MTX  0x10
#define CCR_TXAK 0x08
#define CCR_RSTA 0x04
49
#define CCR_RSVD 0x02
Linus Torvalds's avatar
Linus Torvalds committed
50
51
52
53
54
55
56
57
58

#define CSR_MCF  0x80
#define CSR_MAAS 0x40
#define CSR_MBB  0x20
#define CSR_MAL  0x10
#define CSR_SRW  0x04
#define CSR_MIF  0x02
#define CSR_RXAK 0x01

59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
enum mpc_i2c_action {
	MPC_I2C_ACTION_START = 1,
	MPC_I2C_ACTION_RESTART,
	MPC_I2C_ACTION_READ_BEGIN,
	MPC_I2C_ACTION_READ_BYTE,
	MPC_I2C_ACTION_WRITE,
	MPC_I2C_ACTION_STOP,

	__MPC_I2C_ACTION_CNT
};

static const char * const action_str[] = {
	"invalid",
	"start",
	"restart",
	"read begin",
	"read",
	"write",
	"stop",
};

static_assert(ARRAY_SIZE(action_str) == __MPC_I2C_ACTION_CNT);

Linus Torvalds's avatar
Linus Torvalds committed
82
struct mpc_i2c {
83
	struct device *dev;
Al Viro's avatar
Al Viro committed
84
	void __iomem *base;
Linus Torvalds's avatar
Linus Torvalds committed
85
	u32 interrupt;
86
87
	wait_queue_head_t waitq;
	spinlock_t lock;
Linus Torvalds's avatar
Linus Torvalds committed
88
89
	struct i2c_adapter adap;
	int irq;
90
	u32 real_clk;
91
	u8 fdr, dfsrr;
92
	struct clk *clk_per;
93
94
95
96
97
98
99
100
101
	u32 cntl_bits;
	enum mpc_i2c_action action;
	struct i2c_msg *msgs;
	int num_msgs;
	int curr_msg;
	u32 byte_posn;
	u32 block;
	int rc;
	int expect_rxack;
102
	bool has_errata_A004447;
103
104
105
106
107
108
109
};

struct mpc_i2c_divider {
	u16 divider;
	u16 fdr;	/* including dfsrr */
};

110
struct mpc_i2c_data {
111
	void (*setup)(struct device_node *node, struct mpc_i2c *i2c, u32 clock);
Linus Torvalds's avatar
Linus Torvalds committed
112
113
};

114
static inline void writeccr(struct mpc_i2c *i2c, u32 x)
Linus Torvalds's avatar
Linus Torvalds committed
115
116
117
118
{
	writeb(x, i2c->base + MPC_I2C_CR);
}

119
120
121
/* Sometimes 9th clock pulse isn't generated, and slave doesn't release
 * the bus, because it wants to send ACK.
 * Following sequence of enabling/disabling and sending start/stop generates
122
 * the 9 pulses, so it's all OK.
123
124
125
 */
static void mpc_i2c_fixup(struct mpc_i2c *i2c)
{
126
127
128
129
130
131
132
133
134
	int k;
	u32 delay_val = 1000000 / i2c->real_clk + 1;

	if (delay_val < 2)
		delay_val = 2;

	for (k = 9; k; k--) {
		writeccr(i2c, 0);
		writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
135
		readb(i2c->base + MPC_I2C_DR);
136
137
138
		writeccr(i2c, CCR_MEN);
		udelay(delay_val << 1);
	}
139
140
}

141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
static int i2c_mpc_wait_sr(struct mpc_i2c *i2c, int mask)
{
	void __iomem *addr = i2c->base + MPC_I2C_SR;
	u8 val;

	return readb_poll_timeout(addr, val, val & mask, 0, 100);
}

/*
 * Workaround for Erratum A004447. From the P2040CE Rev Q
 *
 * 1.  Set up the frequency divider and sampling rate.
 * 2.  I2CCR - a0h
 * 3.  Poll for I2CSR[MBB] to get set.
 * 4.  If I2CSR[MAL] is set (an indication that SDA is stuck low), then go to
 *     step 5. If MAL is not set, then go to step 13.
 * 5.  I2CCR - 00h
 * 6.  I2CCR - 22h
 * 7.  I2CCR - a2h
 * 8.  Poll for I2CSR[MBB] to get set.
 * 9.  Issue read to I2CDR.
 * 10. Poll for I2CSR[MIF] to be set.
 * 11. I2CCR - 82h
 * 12. Workaround complete. Skip the next steps.
 * 13. Issue read to I2CDR.
 * 14. Poll for I2CSR[MIF] to be set.
 * 15. I2CCR - 80h
 */
static void mpc_i2c_fixup_A004447(struct mpc_i2c *i2c)
{
	int ret;
	u32 val;

	writeccr(i2c, CCR_MEN | CCR_MSTA);
	ret = i2c_mpc_wait_sr(i2c, CSR_MBB);
	if (ret) {
		dev_err(i2c->dev, "timeout waiting for CSR_MBB\n");
		return;
	}

	val = readb(i2c->base + MPC_I2C_SR);

	if (val & CSR_MAL) {
		writeccr(i2c, 0x00);
		writeccr(i2c, CCR_MSTA | CCR_RSVD);
		writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSVD);
		ret = i2c_mpc_wait_sr(i2c, CSR_MBB);
		if (ret) {
			dev_err(i2c->dev, "timeout waiting for CSR_MBB\n");
			return;
		}
		val = readb(i2c->base + MPC_I2C_DR);
		ret = i2c_mpc_wait_sr(i2c, CSR_MIF);
		if (ret) {
			dev_err(i2c->dev, "timeout waiting for CSR_MIF\n");
			return;
		}
		writeccr(i2c, CCR_MEN | CCR_RSVD);
	} else {
		val = readb(i2c->base + MPC_I2C_DR);
		ret = i2c_mpc_wait_sr(i2c, CSR_MIF);
		if (ret) {
			dev_err(i2c->dev, "timeout waiting for CSR_MIF\n");
			return;
		}
		writeccr(i2c, CCR_MEN);
	}
}

210
#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
211
static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
	{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
	{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
	{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
	{52, 0x63}, {56, 0x29}, {60, 0x41}, {64, 0x2a},
	{68, 0x07}, {72, 0x2b}, {80, 0x2c}, {88, 0x09},
	{96, 0x2d}, {104, 0x0a}, {112, 0x2e}, {120, 0x81},
	{128, 0x2f}, {136, 0x47}, {144, 0x0c}, {160, 0x30},
	{176, 0x49}, {192, 0x31}, {208, 0x4a}, {224, 0x32},
	{240, 0x0f}, {256, 0x33}, {272, 0x87}, {288, 0x10},
	{320, 0x34}, {352, 0x89}, {384, 0x35}, {416, 0x8a},
	{448, 0x36}, {480, 0x13}, {512, 0x37}, {576, 0x14},
	{640, 0x38}, {768, 0x39}, {896, 0x3a}, {960, 0x17},
	{1024, 0x3b}, {1152, 0x18}, {1280, 0x3c}, {1536, 0x3d},
	{1792, 0x3e}, {1920, 0x1b}, {2048, 0x3f}, {2304, 0x1c},
	{2560, 0x1d}, {3072, 0x1e}, {3584, 0x7e}, {3840, 0x1f},
	{4096, 0x7f}, {4608, 0x5c}, {5120, 0x5d}, {6144, 0x5e},
	{7168, 0xbe}, {7680, 0x5f}, {8192, 0xbf}, {9216, 0x9c},
	{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
};

232
static int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
233
					  u32 *real_clk)
234
{
235
	const struct mpc_i2c_divider *div = NULL;
236
237
238
239
	unsigned int pvr = mfspr(SPRN_PVR);
	u32 divider;
	int i;

240
241
242
	if (clock == MPC_I2C_CLOCK_LEGACY) {
		/* see below - default fdr = 0x3f -> div = 2048 */
		*real_clk = mpc5xxx_get_bus_frequency(node) / 2048;
243
		return -EINVAL;
244
	}
245
246

	/* Determine divider value */
247
	divider = mpc5xxx_get_bus_frequency(node) / clock;
248
249
250
251
252

	/*
	 * We want to choose an FDR/DFSR that generates an I2C bus speed that
	 * is equal to or lower than the requested speed.
	 */
253
	for (i = 0; i < ARRAY_SIZE(mpc_i2c_dividers_52xx); i++) {
254
255
256
257
258
259
260
261
		div = &mpc_i2c_dividers_52xx[i];
		/* Old MPC5200 rev A CPUs do not support the high bits */
		if (div->fdr & 0xc0 && pvr == 0x80822011)
			continue;
		if (div->divider >= divider)
			break;
	}

262
263
	*real_clk = mpc5xxx_get_bus_frequency(node) / div->divider;
	return (int)div->fdr;
264
265
}

266
static void mpc_i2c_setup_52xx(struct device_node *node,
267
					 struct mpc_i2c *i2c,
268
					 u32 clock)
269
{
270
271
	int ret, fdr;

272
273
274
275
276
277
	if (clock == MPC_I2C_CLOCK_PRESERVE) {
		dev_dbg(i2c->dev, "using fdr %d\n",
			readb(i2c->base + MPC_I2C_FDR));
		return;
	}

278
	ret = mpc_i2c_get_fdr_52xx(node, clock, &i2c->real_clk);
279
	fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */
280
281

	writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
282
283

	if (ret >= 0)
284
285
		dev_info(i2c->dev, "clock %u Hz (fdr=%d)\n", i2c->real_clk,
			 fdr);
286
}
287
#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
288
static void mpc_i2c_setup_52xx(struct device_node *node,
289
					 struct mpc_i2c *i2c,
290
					 u32 clock)
291
292
{
}
293
294
295
#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */

#ifdef CONFIG_PPC_MPC512x
296
static void mpc_i2c_setup_512x(struct device_node *node,
297
					 struct mpc_i2c *i2c,
298
					 u32 clock)
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
{
	struct device_node *node_ctrl;
	void __iomem *ctrl;
	const u32 *pval;
	u32 idx;

	/* Enable I2C interrupts for mpc5121 */
	node_ctrl = of_find_compatible_node(NULL, NULL,
					    "fsl,mpc5121-i2c-ctrl");
	if (node_ctrl) {
		ctrl = of_iomap(node_ctrl, 0);
		if (ctrl) {
			/* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
			pval = of_get_property(node, "reg", NULL);
			idx = (*pval & 0xff) / 0x20;
			setbits32(ctrl, 1 << (24 + idx * 2));
			iounmap(ctrl);
		}
		of_node_put(node_ctrl);
	}

	/* The clock setup for the 52xx works also fine for the 512x */
321
	mpc_i2c_setup_52xx(node, i2c, clock);
322
323
}
#else /* CONFIG_PPC_MPC512x */
324
static void mpc_i2c_setup_512x(struct device_node *node,
325
					 struct mpc_i2c *i2c,
326
					 u32 clock)
327
328
329
{
}
#endif /* CONFIG_PPC_MPC512x */
330
331

#ifdef CONFIG_FSL_SOC
332
static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
	{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
	{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
	{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
	{544, 0x0b03}, {576, 0x0104}, {608, 0x1603}, {640, 0x0105},
	{672, 0x2003}, {704, 0x0b05}, {736, 0x2b03}, {768, 0x0106},
	{800, 0x3603}, {832, 0x0b06}, {896, 0x012a}, {960, 0x0107},
	{1024, 0x012b}, {1088, 0x1607}, {1152, 0x0108}, {1216, 0x2b07},
	{1280, 0x0109}, {1408, 0x1609}, {1536, 0x010a}, {1664, 0x160a},
	{1792, 0x012e}, {1920, 0x010b}, {2048, 0x012f}, {2176, 0x2b0b},
	{2304, 0x010c}, {2560, 0x010d}, {2816, 0x2b0d}, {3072, 0x010e},
	{3328, 0x2b0e}, {3584, 0x0132}, {3840, 0x010f}, {4096, 0x0133},
	{4608, 0x0110}, {5120, 0x0111}, {6144, 0x0112}, {7168, 0x0136},
	{7680, 0x0113}, {8192, 0x0137}, {9216, 0x0114}, {10240, 0x0115},
	{12288, 0x0116}, {14336, 0x013a}, {15360, 0x0117}, {16384, 0x013b},
	{18432, 0x0118}, {20480, 0x0119}, {24576, 0x011a}, {28672, 0x013e},
	{30720, 0x011b}, {32768, 0x013f}, {36864, 0x011c}, {40960, 0x011d},
	{49152, 0x011e}, {61440, 0x011f}
};

352
static u32 mpc_i2c_get_sec_cfg_8xxx(void)
353
{
354
	struct device_node *node;
355
356
357
358
359
360
361
362
363
	u32 __iomem *reg;
	u32 val = 0;

	node = of_find_node_by_name(NULL, "global-utilities");
	if (node) {
		const u32 *prop = of_get_property(node, "reg", NULL);
		if (prop) {
			/*
			 * Map and check POR Device Status Register 2
364
365
366
367
368
			 * (PORDEVSR2) at 0xE0014. Note than while MPC8533
			 * and MPC8544 indicate SEC frequency ratio
			 * configuration as bit 26 in PORDEVSR2, other MPC8xxx
			 * parts may store it differently or may not have it
			 * at all.
369
370
371
372
373
374
			 */
			reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
			if (!reg)
				printk(KERN_ERR
				       "Error: couldn't map PORDEVSR2\n");
			else
375
				val = in_be32(reg) & 0x00000020; /* sec-cfg */
376
377
378
			iounmap(reg);
		}
	}
379
	of_node_put(node);
380
381
382
383

	return val;
}

384
385
static u32 mpc_i2c_get_prescaler_8xxx(void)
{
386
387
388
389
390
	/*
	 * According to the AN2919 all MPC824x have prescaler 1, while MPC83xx
	 * may have prescaler 1, 2, or 3, depending on the power-on
	 * configuration.
	 */
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
	u32 prescaler = 1;

	/* mpc85xx */
	if (pvr_version_is(PVR_VER_E500V1) || pvr_version_is(PVR_VER_E500V2)
		|| pvr_version_is(PVR_VER_E500MC)
		|| pvr_version_is(PVR_VER_E5500)
		|| pvr_version_is(PVR_VER_E6500)) {
		unsigned int svr = mfspr(SPRN_SVR);

		if ((SVR_SOC_VER(svr) == SVR_8540)
			|| (SVR_SOC_VER(svr) == SVR_8541)
			|| (SVR_SOC_VER(svr) == SVR_8560)
			|| (SVR_SOC_VER(svr) == SVR_8555)
			|| (SVR_SOC_VER(svr) == SVR_8610))
			/* the above 85xx SoCs have prescaler 1 */
			prescaler = 1;
407
408
409
410
		else if ((SVR_SOC_VER(svr) == SVR_8533)
			|| (SVR_SOC_VER(svr) == SVR_8544))
			/* the above 85xx SoCs have prescaler 3 or 2 */
			prescaler = mpc_i2c_get_sec_cfg_8xxx() ? 3 : 2;
411
412
413
414
415
416
417
418
		else
			/* all the other 85xx have prescaler 2 */
			prescaler = 2;
	}

	return prescaler;
}

419
static int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
420
					  u32 *real_clk)
421
422
{
	const struct mpc_i2c_divider *div = NULL;
423
	u32 prescaler = mpc_i2c_get_prescaler_8xxx();
424
425
426
	u32 divider;
	int i;

427
428
429
430
431
432
	if (clock == MPC_I2C_CLOCK_LEGACY) {
		/* see below - default fdr = 0x1031 -> div = 16 * 3072 */
		*real_clk = fsl_get_sys_freq() / prescaler / (16 * 3072);
		return -EINVAL;
	}

433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
	divider = fsl_get_sys_freq() / clock / prescaler;

	pr_debug("I2C: src_clock=%d clock=%d divider=%d\n",
		 fsl_get_sys_freq(), clock, divider);

	/*
	 * We want to choose an FDR/DFSR that generates an I2C bus speed that
	 * is equal to or lower than the requested speed.
	 */
	for (i = 0; i < ARRAY_SIZE(mpc_i2c_dividers_8xxx); i++) {
		div = &mpc_i2c_dividers_8xxx[i];
		if (div->divider >= divider)
			break;
	}

448
	*real_clk = fsl_get_sys_freq() / prescaler / div->divider;
449
	return (int)div->fdr;
450
451
}

452
static void mpc_i2c_setup_8xxx(struct device_node *node,
453
					 struct mpc_i2c *i2c,
454
					 u32 clock)
455
{
456
457
	int ret, fdr;

458
459
460
461
462
463
464
	if (clock == MPC_I2C_CLOCK_PRESERVE) {
		dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n",
			readb(i2c->base + MPC_I2C_DFSRR),
			readb(i2c->base + MPC_I2C_FDR));
		return;
	}

465
	ret = mpc_i2c_get_fdr_8xxx(node, clock, &i2c->real_clk);
466
	fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */
467
468
469

	writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
	writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR);
470
471
472

	if (ret >= 0)
		dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n",
473
			 i2c->real_clk, fdr >> 8, fdr & 0xff);
474
475
476
}

#else /* !CONFIG_FSL_SOC */
477
static void mpc_i2c_setup_8xxx(struct device_node *node,
478
					 struct mpc_i2c *i2c,
479
					 u32 clock)
Linus Torvalds's avatar
Linus Torvalds committed
480
481
{
}
482
#endif /* CONFIG_FSL_SOC */
Linus Torvalds's avatar
Linus Torvalds committed
483

484
static void mpc_i2c_finish(struct mpc_i2c *i2c, int rc)
Linus Torvalds's avatar
Linus Torvalds committed
485
{
486
487
488
489
490
	i2c->rc = rc;
	i2c->block = 0;
	i2c->cntl_bits = CCR_MEN;
	writeccr(i2c, i2c->cntl_bits);
	wake_up(&i2c->waitq);
Linus Torvalds's avatar
Linus Torvalds committed
491
492
}

493
static void mpc_i2c_do_action(struct mpc_i2c *i2c)
Linus Torvalds's avatar
Linus Torvalds committed
494
{
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
	struct i2c_msg *msg = &i2c->msgs[i2c->curr_msg];
	int dir = 0;
	int recv_len = 0;
	u8 byte;

	dev_dbg(i2c->dev, "action = %s\n", action_str[i2c->action]);

	i2c->cntl_bits &= ~(CCR_RSTA | CCR_MTX | CCR_TXAK);

	if (msg->flags & I2C_M_RD)
		dir = 1;
	if (msg->flags & I2C_M_RECV_LEN)
		recv_len = 1;

	switch (i2c->action) {
	case MPC_I2C_ACTION_RESTART:
		i2c->cntl_bits |= CCR_RSTA;
		fallthrough;

	case MPC_I2C_ACTION_START:
		i2c->cntl_bits |= CCR_MSTA | CCR_MTX;
		writeccr(i2c, i2c->cntl_bits);
		writeb((msg->addr << 1) | dir, i2c->base + MPC_I2C_DR);
		i2c->expect_rxack = 1;
		i2c->action = dir ? MPC_I2C_ACTION_READ_BEGIN : MPC_I2C_ACTION_WRITE;
		break;

	case MPC_I2C_ACTION_READ_BEGIN:
		if (msg->len) {
			if (msg->len == 1 && !(msg->flags & I2C_M_RECV_LEN))
				i2c->cntl_bits |= CCR_TXAK;

			writeccr(i2c, i2c->cntl_bits);
			/* Dummy read */
			readb(i2c->base + MPC_I2C_DR);
		}
		i2c->action = MPC_I2C_ACTION_READ_BYTE;
		break;

	case MPC_I2C_ACTION_READ_BYTE:
		if (i2c->byte_posn || !recv_len) {
			/* Generate Tx ACK on next to last byte */
			if (i2c->byte_posn == msg->len - 2)
				i2c->cntl_bits |= CCR_TXAK;
539
			/* Do not generate stop on last byte */
540
541
542
543
			if (i2c->byte_posn == msg->len - 1)
				i2c->cntl_bits |= CCR_MTX;

			writeccr(i2c, i2c->cntl_bits);
544
545
546
547
		}

		byte = readb(i2c->base + MPC_I2C_DR);

548
549
550
551
552
553
		if (i2c->byte_posn == 0 && recv_len) {
			if (byte == 0 || byte > I2C_SMBUS_BLOCK_MAX) {
				mpc_i2c_finish(i2c, -EPROTO);
				return;
			}
			msg->len += byte;
554
			/*
555
			 * For block reads, generate Tx ACK here if data length
556
557
			 * is 1 byte (total length is 2 bytes).
			 */
558
559
560
561
			if (msg->len == 2) {
				i2c->cntl_bits |= CCR_TXAK;
				writeccr(i2c, i2c->cntl_bits);
			}
562
		}
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581

		dev_dbg(i2c->dev, "%s %02x\n", action_str[i2c->action], byte);
		msg->buf[i2c->byte_posn++] = byte;
		break;

	case MPC_I2C_ACTION_WRITE:
		dev_dbg(i2c->dev, "%s %02x\n", action_str[i2c->action],
			msg->buf[i2c->byte_posn]);
		writeb(msg->buf[i2c->byte_posn++], i2c->base + MPC_I2C_DR);
		i2c->expect_rxack = 1;
		break;

	case MPC_I2C_ACTION_STOP:
		mpc_i2c_finish(i2c, 0);
		break;

	default:
		WARN(1, "Unexpected action %d\n", i2c->action);
		break;
Linus Torvalds's avatar
Linus Torvalds committed
582
583
	}

584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
	if (msg->len == i2c->byte_posn) {
		i2c->curr_msg++;
		i2c->byte_posn = 0;

		if (i2c->curr_msg == i2c->num_msgs) {
			i2c->action = MPC_I2C_ACTION_STOP;
			/*
			 * We don't get another interrupt on read so
			 * finish the transfer now
			 */
			if (dir)
				mpc_i2c_finish(i2c, 0);
		} else {
			i2c->action = MPC_I2C_ACTION_RESTART;
		}
	}
Linus Torvalds's avatar
Linus Torvalds committed
600
601
}

602
static void mpc_i2c_do_intr(struct mpc_i2c *i2c, u8 status)
Linus Torvalds's avatar
Linus Torvalds committed
603
{
604
	spin_lock(&i2c->lock);
Linus Torvalds's avatar
Linus Torvalds committed
605

606
607
608
609
610
	if (!(status & CSR_MCF)) {
		dev_dbg(i2c->dev, "unfinished\n");
		mpc_i2c_finish(i2c, -EIO);
		goto out;
	}
Linus Torvalds's avatar
Linus Torvalds committed
611

612
613
614
615
616
	if (status & CSR_MAL) {
		dev_dbg(i2c->dev, "arbitration lost\n");
		mpc_i2c_finish(i2c, -EAGAIN);
		goto out;
	}
617

618
619
620
621
	if (i2c->expect_rxack && (status & CSR_RXAK)) {
		dev_dbg(i2c->dev, "no Rx ACK\n");
		mpc_i2c_finish(i2c, -ENXIO);
		goto out;
Linus Torvalds's avatar
Linus Torvalds committed
622
	}
623
	i2c->expect_rxack = 0;
Linus Torvalds's avatar
Linus Torvalds committed
624

625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
	mpc_i2c_do_action(i2c);

out:
	spin_unlock(&i2c->lock);
}

static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
{
	struct mpc_i2c *i2c = dev_id;
	u8 status;

	status = readb(i2c->base + MPC_I2C_SR);
	if (status & CSR_MIF) {
		writeb(0, i2c->base + MPC_I2C_SR);
		mpc_i2c_do_intr(i2c, status);
		return IRQ_HANDLED;
Linus Torvalds's avatar
Linus Torvalds committed
641
	}
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
	return IRQ_NONE;
}

static int mpc_i2c_wait_for_completion(struct mpc_i2c *i2c)
{
	long time_left;

	time_left = wait_event_timeout(i2c->waitq, !i2c->block, i2c->adap.timeout);
	if (!time_left)
		return -ETIMEDOUT;
	if (time_left < 0)
		return time_left;

	return 0;
}

static int mpc_i2c_execute_msg(struct mpc_i2c *i2c)
{
	unsigned long orig_jiffies;
	unsigned long flags;
	int ret;

	spin_lock_irqsave(&i2c->lock, flags);

	i2c->curr_msg = 0;
	i2c->rc = 0;
	i2c->byte_posn = 0;
	i2c->block = 1;
	i2c->action = MPC_I2C_ACTION_START;

	i2c->cntl_bits = CCR_MEN | CCR_MIEN;
	writeb(0, i2c->base + MPC_I2C_SR);
	writeccr(i2c, i2c->cntl_bits);

	mpc_i2c_do_action(i2c);

	spin_unlock_irqrestore(&i2c->lock, flags);

	ret = mpc_i2c_wait_for_completion(i2c);
	if (ret)
		i2c->rc = ret;

	if (i2c->rc == -EIO || i2c->rc == -EAGAIN || i2c->rc == -ETIMEDOUT)
		i2c_recover_bus(&i2c->adap);

687
688
689
690
691
692
693
694
695
696
	orig_jiffies = jiffies;
	/* Wait until STOP is seen, allow up to 1 s */
	while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
		if (time_after(jiffies, orig_jiffies + HZ)) {
			u8 status = readb(i2c->base + MPC_I2C_SR);

			dev_dbg(i2c->dev, "timeout\n");
			if ((status & (CSR_MCF | CSR_MBB | CSR_RXAK)) != 0) {
				writeb(status & ~CSR_MAL,
				       i2c->base + MPC_I2C_SR);
697
				i2c_recover_bus(&i2c->adap);
698
699
700
701
702
			}
			return -EIO;
		}
		cond_resched();
	}
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731

	return i2c->rc;
}

static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
	int rc, ret = num;
	struct mpc_i2c *i2c = i2c_get_adapdata(adap);
	int i;

	dev_dbg(i2c->dev, "num = %d\n", num);
	for (i = 0; i < num; i++)
		dev_dbg(i2c->dev, "  addr = %02x, flags = %02x, len = %d, %*ph\n",
			msgs[i].addr, msgs[i].flags, msgs[i].len,
			msgs[i].flags & I2C_M_RD ? 0 : msgs[i].len,
			msgs[i].buf);

	WARN_ON(i2c->msgs != NULL);
	i2c->msgs = msgs;
	i2c->num_msgs = num;

	rc = mpc_i2c_execute_msg(i2c);
	if (rc < 0)
		ret = rc;

	i2c->num_msgs = 0;
	i2c->msgs = NULL;

	return ret;
Linus Torvalds's avatar
Linus Torvalds committed
732
733
734
735
}

static u32 mpc_functionality(struct i2c_adapter *adap)
{
736
737
	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL
	  | I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_FUNC_SMBUS_BLOCK_PROC_CALL;
Linus Torvalds's avatar
Linus Torvalds committed
738
739
}

740
741
742
743
static int fsl_i2c_bus_recovery(struct i2c_adapter *adap)
{
	struct mpc_i2c *i2c = i2c_get_adapdata(adap);

744
745
746
747
	if (i2c->has_errata_A004447)
		mpc_i2c_fixup_A004447(i2c);
	else
		mpc_i2c_fixup(i2c);
748
749
750
751

	return 0;
}

752
static const struct i2c_algorithm mpc_algo = {
Linus Torvalds's avatar
Linus Torvalds committed
753
754
755
756
757
758
759
	.master_xfer = mpc_xfer,
	.functionality = mpc_functionality,
};

static struct i2c_adapter mpc_ops = {
	.owner = THIS_MODULE,
	.algo = &mpc_algo,
760
	.timeout = HZ,
Linus Torvalds's avatar
Linus Torvalds committed
761
762
};

763
764
765
766
static struct i2c_bus_recovery_info fsl_i2c_recovery_info = {
	.recover_bus = fsl_i2c_bus_recovery,
};

767
static int fsl_i2c_probe(struct platform_device *op)
768
{
769
	const struct mpc_i2c_data *data;
770
	struct mpc_i2c *i2c;
771
	const u32 *prop;
772
	u32 clock = MPC_I2C_CLOCK_LEGACY;
773
774
	int result = 0;
	int plen;
775
776
	struct clk *clk;
	int err;
777

778
	i2c = devm_kzalloc(&op->dev, sizeof(*i2c), GFP_KERNEL);
779
	if (!i2c)
780
781
		return -ENOMEM;

782
783
	i2c->dev = &op->dev; /* for debug and error output */

784
785
	init_waitqueue_head(&i2c->waitq);
	spin_lock_init(&i2c->lock);
786

787
	i2c->base = devm_platform_ioremap_resource(op, 0);
788
	if (IS_ERR(i2c->base))
789
		return PTR_ERR(i2c->base);
790

791
792
793
	i2c->irq = platform_get_irq(op, 0);
	if (i2c->irq < 0)
		return i2c->irq;
794

795
	result = devm_request_irq(&op->dev, i2c->irq, mpc_i2c_isr,
796
797
798
			IRQF_SHARED, "i2c-mpc", i2c);
	if (result < 0) {
		dev_err(i2c->dev, "failed to attach interrupt\n");
799
		return result;
800
	}
801

802
803
804
805
	/*
	 * enable clock for the I2C peripheral (non fatal),
	 * keep a reference upon successful allocation
	 */
806
807
808
809
810
811
812
813
	clk = devm_clk_get_optional(&op->dev, NULL);
	if (IS_ERR(clk))
		return PTR_ERR(clk);

	err = clk_prepare_enable(clk);
	if (err) {
		dev_err(&op->dev, "failed to enable clock\n");
		return err;
814
815
	}

816
817
	i2c->clk_per = clk;

818
	if (of_property_read_bool(op->dev.of_node, "fsl,preserve-clocking")) {
819
820
		clock = MPC_I2C_CLOCK_PRESERVE;
	} else {
821
822
		prop = of_get_property(op->dev.of_node, "clock-frequency",
					&plen);
823
824
		if (prop && plen == sizeof(u32))
			clock = *prop;
825
	}
826

827
828
	data = device_get_match_data(&op->dev);
	if (data) {
829
		data->setup(op->dev.of_node, i2c, clock);
830
831
	} else {
		/* Backwards compatibility */
832
		if (of_get_property(op->dev.of_node, "dfsrr", NULL))
833
			mpc_i2c_setup_8xxx(op->dev.of_node, i2c, clock);
834
	}
835

836
837
838
839
840
841
842
843
	prop = of_get_property(op->dev.of_node, "fsl,timeout", &plen);
	if (prop && plen == sizeof(u32)) {
		mpc_ops.timeout = *prop * HZ / 1000000;
		if (mpc_ops.timeout < 5)
			mpc_ops.timeout = 5;
	}
	dev_info(i2c->dev, "timeout %u us\n", mpc_ops.timeout * 1000000 / HZ);

844
845
846
	if (of_property_read_bool(op->dev.of_node, "fsl,i2c-erratum-a004447"))
		i2c->has_errata_A004447 = true;

847
	i2c->adap = mpc_ops;
848
	scnprintf(i2c->adap.name, sizeof(i2c->adap.name),
849
		  "MPC adapter (%s)", of_node_full_name(op->dev.of_node));
850
	i2c->adap.dev.parent = &op->dev;
851
	i2c->adap.nr = op->id;
Grant Likely's avatar
Grant Likely committed
852
	i2c->adap.dev.of_node = of_node_get(op->dev.of_node);
853
	i2c->adap.bus_recovery_info = &fsl_i2c_recovery_info;
854
855
	platform_set_drvdata(op, i2c);
	i2c_set_adapdata(&i2c->adap, i2c);
856

857
858
	result = i2c_add_numbered_adapter(&i2c->adap);
	if (result)
859
860
		goto fail_add;

861
	return 0;
862

863
 fail_add:
864
	clk_disable_unprepare(i2c->clk_per);
865

866
867
868
	return result;
};

869
static int fsl_i2c_remove(struct platform_device *op)
870
{
871
	struct mpc_i2c *i2c = platform_get_drvdata(op);
872
873
874

	i2c_del_adapter(&i2c->adap);

875
	clk_disable_unprepare(i2c->clk_per);
876

877
878
879
	return 0;
};

880
static int __maybe_unused mpc_i2c_suspend(struct device *dev)
881
882
883
884
885
886
887
888
889
{
	struct mpc_i2c *i2c = dev_get_drvdata(dev);

	i2c->fdr = readb(i2c->base + MPC_I2C_FDR);
	i2c->dfsrr = readb(i2c->base + MPC_I2C_DFSRR);

	return 0;
}

890
static int __maybe_unused mpc_i2c_resume(struct device *dev)
891
892
893
894
895
896
897
898
{
	struct mpc_i2c *i2c = dev_get_drvdata(dev);

	writeb(i2c->fdr, i2c->base + MPC_I2C_FDR);
	writeb(i2c->dfsrr, i2c->base + MPC_I2C_DFSRR);

	return 0;
}
899
static SIMPLE_DEV_PM_OPS(mpc_i2c_pm_ops, mpc_i2c_suspend, mpc_i2c_resume);
900

901
static const struct mpc_i2c_data mpc_i2c_data_512x = {
902
903
904
	.setup = mpc_i2c_setup_512x,
};

905
static const struct mpc_i2c_data mpc_i2c_data_52xx = {
906
	.setup = mpc_i2c_setup_52xx,
907
908
};

909
static const struct mpc_i2c_data mpc_i2c_data_8313 = {
910
	.setup = mpc_i2c_setup_8xxx,
911
912
};

913
static const struct mpc_i2c_data mpc_i2c_data_8543 = {
914
	.setup = mpc_i2c_setup_8xxx,
915
916
};

917
static const struct mpc_i2c_data mpc_i2c_data_8544 = {
918
	.setup = mpc_i2c_setup_8xxx,
919
920
};

921
static const struct of_device_id mpc_i2c_of_match[] = {
922
923
924
	{.compatible = "mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
	{.compatible = "fsl,mpc5200b-i2c", .data = &mpc_i2c_data_52xx, },
	{.compatible = "fsl,mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
925
	{.compatible = "fsl,mpc5121-i2c", .data = &mpc_i2c_data_512x, },
926
927
928
	{.compatible = "fsl,mpc8313-i2c", .data = &mpc_i2c_data_8313, },
	{.compatible = "fsl,mpc8543-i2c", .data = &mpc_i2c_data_8543, },
	{.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, },
929
930
	/* Backward compatibility */
	{.compatible = "fsl-i2c", },
931
932
933
934
	{},
};
MODULE_DEVICE_TABLE(of, mpc_i2c_of_match);

935
/* Structure for a device driver */
936
static struct platform_driver mpc_i2c_driver = {
937
	.probe		= fsl_i2c_probe,
938
	.remove		= fsl_i2c_remove,
939
940
941
	.driver = {
		.name = DRV_NAME,
		.of_match_table = mpc_i2c_of_match,
942
		.pm = &mpc_i2c_pm_ops,
943
	},
944
945
};

946
module_platform_driver(mpc_i2c_driver);
947

Linus Torvalds's avatar
Linus Torvalds committed
948
MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
949
MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "
950
		   "MPC824x/83xx/85xx/86xx/512x/52xx processors");
Linus Torvalds's avatar
Linus Torvalds committed
951
MODULE_LICENSE("GPL");