Commit 1e8ed06d authored by Kumar Gala's avatar Kumar Gala Committed by Scott Wood
Browse files

powerpc/mpc85xx: Add FSL QorIQ DPAA BMan support to device tree(s)



Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
Signed-off-by: default avatarGeoff Thorpe <Geoff.Thorpe@freescale.com>
Signed-off-by: default avatarHai-Ying Wang <Haiying.Wang@freescale.com>
Signed-off-by: default avatarChunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: default avatarPoonam Aggrwal <poonam.aggrwal@freescale.com>
[Emil Medve: Sync with the upstream binding]
Signed-off-by: default avatarEmil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
parent cb5915e7
/*
* B4420DS Device Tree Source
*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2012 - 2014 Freescale Semiconductor, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -97,10 +97,25 @@ memory {
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01052000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x2000000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;
......
/*
* B4860 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2012 Freescale Semiconductor Inc.
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -109,6 +109,64 @@ dcsr-cpu-sb-proxy@118000 {
};
};
&bportals {
bman-portal@38000 {
compatible = "fsl,bman-portal";
reg = <0x38000 0x4000>, <0x100e000 0x1000>;
interrupts = <133 2 0 0>;
};
bman-portal@3c000 {
compatible = "fsl,bman-portal";
reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
interrupts = <135 2 0 0>;
};
bman-portal@40000 {
compatible = "fsl,bman-portal";
reg = <0x40000 0x4000>, <0x1010000 0x1000>;
interrupts = <137 2 0 0>;
};
bman-portal@44000 {
compatible = "fsl,bman-portal";
reg = <0x44000 0x4000>, <0x1011000 0x1000>;
interrupts = <139 2 0 0>;
};
bman-portal@48000 {
compatible = "fsl,bman-portal";
reg = <0x48000 0x4000>, <0x1012000 0x1000>;
interrupts = <141 2 0 0>;
};
bman-portal@4c000 {
compatible = "fsl,bman-portal";
reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
interrupts = <143 2 0 0>;
};
bman-portal@50000 {
compatible = "fsl,bman-portal";
reg = <0x50000 0x4000>, <0x1014000 0x1000>;
interrupts = <145 2 0 0>;
};
bman-portal@54000 {
compatible = "fsl,bman-portal";
reg = <0x54000 0x4000>, <0x1015000 0x1000>;
interrupts = <147 2 0 0>;
};
bman-portal@58000 {
compatible = "fsl,bman-portal";
reg = <0x58000 0x4000>, <0x1016000 0x1000>;
interrupts = <149 2 0 0>;
};
bman-portal@5c000 {
compatible = "fsl,bman-portal";
reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
interrupts = <151 2 0 0>;
};
bman-portal@60000 {
compatible = "fsl,bman-portal";
reg = <0x60000 0x4000>, <0x1018000 0x1000>;
interrupts = <153 2 0 0>;
};
};
&soc {
ddr2: memory-controller@9000 {
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
......
/*
* B4420 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2012 - 2014 Freescale Semiconductor, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -32,6 +32,11 @@
* this software, even if advised of the possibility of such damage.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
};
&ifc {
#address-cells = <2>;
#size-cells = <1>;
......@@ -128,6 +133,83 @@ dcsr-cpu-sb-proxy@100000 {
};
};
&bportals {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "simple-bus";
bman-portal@0 {
compatible = "fsl,bman-portal";
reg = <0x0 0x4000>, <0x1000000 0x1000>;
interrupts = <105 2 0 0>;
};
bman-portal@4000 {
compatible = "fsl,bman-portal";
reg = <0x4000 0x4000>, <0x1001000 0x1000>;
interrupts = <107 2 0 0>;
};
bman-portal@8000 {
compatible = "fsl,bman-portal";
reg = <0x8000 0x4000>, <0x1002000 0x1000>;
interrupts = <109 2 0 0>;
};
bman-portal@c000 {
compatible = "fsl,bman-portal";
reg = <0xc000 0x4000>, <0x1003000 0x1000>;
interrupts = <111 2 0 0>;
};
bman-portal@10000 {
compatible = "fsl,bman-portal";
reg = <0x10000 0x4000>, <0x1004000 0x1000>;
interrupts = <113 2 0 0>;
};
bman-portal@14000 {
compatible = "fsl,bman-portal";
reg = <0x14000 0x4000>, <0x1005000 0x1000>;
interrupts = <115 2 0 0>;
};
bman-portal@18000 {
compatible = "fsl,bman-portal";
reg = <0x18000 0x4000>, <0x1006000 0x1000>;
interrupts = <117 2 0 0>;
};
bman-portal@1c000 {
compatible = "fsl,bman-portal";
reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
interrupts = <119 2 0 0>;
};
bman-portal@20000 {
compatible = "fsl,bman-portal";
reg = <0x20000 0x4000>, <0x1008000 0x1000>;
interrupts = <121 2 0 0>;
};
bman-portal@24000 {
compatible = "fsl,bman-portal";
reg = <0x24000 0x4000>, <0x1009000 0x1000>;
interrupts = <123 2 0 0>;
};
bman-portal@28000 {
compatible = "fsl,bman-portal";
reg = <0x28000 0x4000>, <0x100a000 0x1000>;
interrupts = <125 2 0 0>;
};
bman-portal@2c000 {
compatible = "fsl,bman-portal";
reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
interrupts = <127 2 0 0>;
};
bman-portal@30000 {
compatible = "fsl,bman-portal";
reg = <0x30000 0x4000>, <0x100c000 0x1000>;
interrupts = <129 2 0 0>;
};
bman-portal@34000 {
compatible = "fsl,bman-portal";
reg = <0x34000 0x4000>, <0x100d000 0x1000>;
interrupts = <131 2 0 0>;
};
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -261,6 +343,11 @@ sdhc@114000 {
/include/ "qoriq-duart-1.dtsi"
/include/ "qoriq-sec5.3-0.dtsi"
/include/ "qoriq-bman1.dtsi"
bman: bman@31a000 {
interrupts = <16 2 1 29>;
};
L2: l2-cache-controller@c20000 {
compatible = "fsl,b4-l2-cache-controller";
reg = <0xc20000 0x1000>;
......
/*
* P1023/P1017 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2011 Freescale Semiconductor Inc.
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10 0>;
};
&lbc {
#address-cells = <2>;
#size-cells = <1>;
......@@ -97,6 +102,28 @@ pcie@0 {
};
};
&bportals {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
bman-portal@0 {
compatible = "fsl,bman-portal";
reg = <0x0 0x4000>, <0x100000 0x1000>;
interrupts = <30 2 0 0>;
};
bman-portal@4000 {
compatible = "fsl,bman-portal";
reg = <0x4000 0x4000>, <0x101000 0x1000>;
interrupts = <32 2 0 0>;
};
bman-portal@8000 {
compatible = "fsl,bman-portal";
reg = <0x8000 0x4000>, <0x102000 0x1000>;
interrupts = <34 2 0 0>;
};
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -221,6 +248,14 @@ rtic_d: rtic-d@60 {
/include/ "pq3-mpic.dtsi"
/include/ "pq3-mpic-timer-B.dtsi"
bman: bman@8a000 {
compatible = "fsl,bman";
reg = <0x8a000 0x1000>;
interrupts = <16 2 0 0>;
fsl,bman-portals = <&bportals>;
memory-region = <&bman_fbpr>;
};
global-utilities@e0000 {
compatible = "fsl,p1023-guts";
reg = <0xe0000 0x1000>;
......
/*
* P2041/P2040 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2011 Freescale Semiconductor Inc.
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10 0>;
};
&lbc {
compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
interrupts = <25 2 0 0>;
......@@ -216,6 +221,8 @@ dcsr-cpu-sb-proxy@43000 {
};
};
/include/ "qoriq-bman1-portals.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -407,4 +414,6 @@ sata@221000 {
crypto: crypto@300000 {
fsl,iommu-parent = <&pamu1>;
};
/include/ "qoriq-bman1.dtsi"
};
/*
* P3041 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2011 Freescale Semiconductor Inc.
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10 0>;
};
&lbc {
compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
interrupts = <25 2 0 0>;
......@@ -243,6 +248,8 @@ dcsr-cpu-sb-proxy@43000 {
};
};
/include/ "qoriq-bman1-portals.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -434,4 +441,6 @@ sata@221000 {
crypto: crypto@300000 {
fsl,iommu-parent = <&pamu1>;
};
/include/ "qoriq-bman1.dtsi"
};
/*
* P4080/P4040 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2011 Freescale Semiconductor Inc.
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10 0>;
};
&lbc {
compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
interrupts = <25 2 0 0>;
......@@ -243,6 +248,8 @@ dcsr-cpu-sb-proxy@47000 {
};
/include/ "qoriq-bman1-portals.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -490,4 +497,6 @@ usb@211000 {
crypto: crypto@300000 {
fsl,iommu-parent = <&pamu1>;
};
/include/ "qoriq-bman1.dtsi"
};
/*
* P5020/5010 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2011 Freescale Semiconductor Inc.
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
};
&lbc {
compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
interrupts = <25 2 0 0>;
......@@ -240,6 +245,8 @@ dcsr-cpu-sb-proxy@41000 {
};
};
/include/ "qoriq-bman1-portals.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -421,6 +428,8 @@ crypto@300000 {
fsl,iommu-parent = <&pamu1>;
};
/include/ "qoriq-bman1.dtsi"
/include/ "qoriq-raid1.0-0.dtsi"
raideng@320000 {
fsl,iommu-parent = <&pamu1>;
......
/*
* P5040 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2012 Freescale Semiconductor Inc.
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -32,6 +32,11 @@
* software, even if advised of the possibility of such damage.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
};
&lbc {
compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
interrupts = <25 2 0 0>;
......@@ -195,6 +200,8 @@ dcsr-cpu-sb-proxy@43000 {
};
};
/include/ "qoriq-bman1-portals.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -399,4 +406,6 @@ sata@221000 {
crypto@300000 {
fsl,iommu-parent = <&pamu4>;
};
/include/ "qoriq-bman1.dtsi"
};
/*
* T1040 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2013 Freescale Semiconductor Inc.
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
};
&ifc {
#address-cells = <2>;
#size-cells = <1>;
......@@ -218,6 +223,63 @@ dcsr-cpu-sb-proxy@118000 {
};
};
&bportals {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "simple-bus";
bman-portal@0 {
compatible = "fsl,bman-portal";
reg = <0x0 0x4000>, <0x1000000 0x1000>;
interrupts = <105 2 0 0>;
};
bman-portal@4000 {
compatible = "fsl,bman-portal";
reg = <0x4000 0x4000>, <0x1001000 0x1000>;
interrupts = <107 2 0 0>;
};
bman-portal@8000 {
compatible = "fsl,bman-portal";
reg = <0x8000 0x4000>, <0x1002000 0x1000>;
interrupts = <109 2 0 0>;
};
bman-portal@c000 {
compatible = "fsl,bman-portal";
reg = <0xc000 0x4000>, <0x1003000 0x1000>;
interrupts = <111 2 0 0>;
};
bman-portal@10000 {
compatible = "fsl,bman-portal";
reg = <0x10000 0x4000>, <0x1004000 0x1000>;
interrupts = <113 2 0 0>;
};
bman-portal@14000 {
compatible = "fsl,bman-portal";
reg = <0x14000 0x4000>, <0x1005000 0x1000>;
interrupts = <115 2 0 0>;
};
bman-portal@18000 {
compatible = "fsl,bman-portal";
reg = <0x18000 0x4000>, <0x1006000 0x1000>;
interrupts = <117 2 0 0>;
};
bman-portal@1c000 {
compatible = "fsl,bman-portal";
reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
interrupts = <119 2 0 0>;
};
bman-portal@20000 {
compatible = "fsl,bman-portal";
reg = <0x20000 0x4000>, <0x1008000 0x1000>;
interrupts = <121 2 0 0>;
};
bman-portal@24000 {
compatible = "fsl,bman-portal";
reg = <0x24000 0x4000>, <0x1009000 0x1000>;
interrupts = <123 2 0 0>;
};
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -401,4 +463,5 @@ sata@221000 {
fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
};
/include/ "qoriq-sec5.0-0.dtsi"
/include/ "qoriq-bman1.dtsi"
};
/*
* T2081 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2013 Freescale Semiconductor Inc.
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
......@@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
};
&ifc {
#address-cells = <2>;
#size-cells = <1>;
......@@ -224,6 +229,103 @@ dcsr-cpu-sb-proxy@118000 {
};
};
&bportals {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "simple-bus";
bman-portal@0 {
compatible = "fsl,bman-portal";
reg = <0x0 0x4000>, <0x1000000 0x1000>;
interrupts = <105 2 0 0>;
};
bman-portal@4000 {
compatible = "fsl,bman-portal";
reg = <0x4000 0x4000>, <0x1001000 0x1000>;
interrupts = <107 2 0 0>;
};
bman-portal@8000 {
compatible = "fsl,bman-portal";
reg = <0x8000 0x4000>, <0x1002000 0x1000>;
interrupts = <109 2 0 0>;
};
bman-portal@c000 {
compatible = "fsl,bman-portal";
reg = <0xc000 0x4000>, <0x1003000 0x1000>;
interrupts = <111 2 0 0>;
};
bman-portal@10000 {
compatible = "fsl,bman-portal";
reg = <0x10000 0x4000>, <0x1004000 0x1000>;
interrupts = <113 2 0 0>;
};
bman-portal@14000 {
compatible = "fsl,bman-portal";
reg = <0x14000 0x4000>, <0x1005000 0x1000>;
interrupts = <115 2 0 0>;
};
bman-portal@18000 {
compatible = "fsl,bman-portal";
reg = <0x18000 0x4000>, <0x1006000 0x1000>;
interrupts = <117 2 0 0>;
};
bman-portal@1c000 {
compatible = "fsl,bman-portal";
reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
interrupts = <119 2 0 0>;
};
bman-portal@20000 {
compatible = "fsl,bman-portal";
reg = <0x20000 0x4000>, <0x1008000 0x1000>;
interrupts = <121 2 0 0>;
};
bman-portal@24000 {
compatible = "fsl,bman-portal";
reg = <0x24000 0x4000>, <0x1009000 0x1000>;
interrupts = <123 2 0 0>;