- 30 Jul, 2015 9 commits
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Andrew Jones authored
Signed-off-by:
Andrew Jones <drjones@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Andrew Jones authored
make install wasn't very useful without also installing scripts for the qemu command lines. I suspect 'make install' was never used. Installing standalone tests could be useful though, so let's do that instead. Signed-off-by:
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Andrew Jones authored
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Andrew Jones authored
This is a pretty ugly bash script, wrapped around a couple ugly bash scripts, and it generates an ugly sh script. But, it gets the job done. What's the job? Take a unit test and generate a standalone script that can be run on any appropriate system with an appropriate qemu. This makes distributing single, pre-compiled, unit tests easy, even through email, which can be useful for getting test results from a variety of users, or even for deploying the unit test as utility (if it works that way) in a distribution. "Packaging" works like shar, but doesn't use shar, as it's better to avoid the dependency. Can be used to create just one unit test, or all of them ('make standalone'). The standalone test(s) are placed in ./tests. Signed-off-by: -
Andrew Jones authored
Only execute the test if DRYRUN isn't set to yes. This is used by mkstandalone.sh Signed-off-by:
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Andrew Jones authored
To avoid duplicating unittests.cfg parsing code in other scripts, let's put it in a file where it can be shared. Signed-off-by:
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Alex Bennée authored
This may be overkill for a project as small as the unit tests now but perhaps it pays to be explicit? Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Signed-off-by:
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Paolo Bonzini authored
Test resampling of level interrupts after EOI, by leaving the IRQ line set in the ISR. One tests does reset the IRQ line after a while, the other uses masking instead in the ISR. Signed-off-by: -
Paolo Bonzini authored
Keeping the selector that was loaded from the 32-bit GDT is okay, because only code segment descriptors differ between 32- and 64-bit mode. In fact the same is true for %ss as well, so let's just remove the whole segment loading from load_tss. Thanks to Bandan Das for debugging. Reported-by:
Shih-Wei Li <shihwei@cs.columbia.edu> Signed-off-by:
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- 23 Jul, 2015 1 commit
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Paolo Bonzini authored
kvm-unit-tests was keeping DS/ES/FS/GS loaded with the segment descriptors provided by the multiboot boot loader (which are 32-bit), and instead loading SS with 0. The vmx.flat test failed because KVM did not like doing writes into such an SS. Load again the segment registers after entering 64-bit mode, for both the BSP and the APs. Signed-off-by:
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- 03 Jul, 2015 5 commits
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Andrew Jones authored
This is port of the test in virtualopensystems tcg_baremetal_tests. Signed-off-by:
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Andrew Jones authored
spinlock torture tests made it clear that checking mmu_enabled() every time we call spin_lock is a bad idea. As most tests will want the MMU enabled the entire time, then we can inline a light weight "nobody disabled the mmu" check, and bail out early. Adding a light weight inlined check vs. a compile-time flag suggested by Paolo. Signed-off-by:
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Andrew Jones authored
The mmu is enabled automatically for all cpus, they must disable it themselves if they don't want it on. Switch from managing a cpumask of enabled cpus to one of disabled cpus. This allows us to remove the mmu_set_enabled call from secondary_cinit, and the function all together. Signed-off-by:
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Andrew Jones authored
Allow unit test cpus to disable the MMU. Why not? We want the test framework to be as flexible as possible. Callers will have to deal with the cache coherency fallout... Cache flush support is still forthcoming to the framework though. Signed-off-by:
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Andrew Jones authored
It shouldn't be necessary to use a barrier on the way into spin_lock. We'll be focused on a single address until we get it (exclusively) set, and then we'll do a barrier on the way out. Also, it does make sense to do a barrier on the way in to spin_unlock, i.e. ensure what we did in the critical section is ordered wrt to what we do outside it, before we announce that we're outside. Signed-off-by:
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- 13 May, 2015 2 commits
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Steve Rutherford authored
Add tests for fundamental behaviors of the IOAPIC: Edge & level triggered interrupts Level triggered interrupt coalescing Level triggered EOIs Interrupt masking Passes with most recent version of KVM on Intel x86. Signed-off-by:Steve Rutherford <srutherford@google.com> Message-Id: <1431482143-28018-2-git-send-email-srutherford@google.com> Signed-off-by:
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Steve Rutherford authored
Split apart the APIC tests into constituent parts (IOAPIC and APIC tests). Signed-off-by:
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- 12 May, 2015 4 commits
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Paolo Bonzini authored
This makes it simpler to add more tests in the future. Signed-off-by: -
Xiao Guangrong authored
This test case is used to produce the bug that: KVM may turn a user page to a kernel page when kernel writes a readonly user page if CR0.WP = 1. This shadow page entry will be reused after SMAP is enabled so that kernel is allowed to access this user page Signed-off-by:
Xiao Guangrong <guangrong.xiao@linux.intel.com> Message-Id: <1430988242-7186-1-git-send-email-guangrong.xiao@linux.intel.com> Signed-off-by:
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Bandan Das authored
This extends the sanity checks done on known common Qemu binary paths when the user supplies a QEMU= on the command line Fixes: b895b967 Signed-off-by:
Bandan Das <bsd@redhat.com> Message-Id: <jpg383krpli.fsf@redhat.com> Signed-off-by:
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Jan Kiszka authored
When we get an EXTINT exit, the guest RIP already points to the instruction after the one that sent it into HLT state. Moving the RIP based on stale insn_len caused spurious L2 crashes. Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Message-Id: <554729D3.5060005@siemens.com> Signed-off-by:
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- 09 Apr, 2015 1 commit
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Bandan Das authored
Before: ./x86-run ./x86/msr.flat QEMU binary has no support for test device. Exiting. After: ./x86-run ./x86/msr.flat A QEMU binary was not found, You can set a custom location by using the QEMU=<path> environment variable Signed-off-by:
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- 18 Mar, 2015 1 commit
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Radim Krčmář authored
GCC 5.0.0 enables raw strings by default and they have higher priority than macros, thus R"[...]" is interpreted incorrectly: lib/x86/isr.c:112:30: error: invalid character ')' in raw string delimiter lib/x86/isr.c:112:8: error: stray ‘R’ in program lib/x86/isr.c:112:26: error: expected ‘:’ or ‘)’ before string constant "orl $0x200, (%%"R"sp)\n\t" Fix it by putting a space between macro R and a string literal. (We already do that somewhere.) Signed-off-by:Radim Krčmář <rkrcmar@redhat.com> Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com>
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- 13 Mar, 2015 2 commits
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Jan Kiszka authored
KVM tends to patch and emulated vmmcall on Intel. But that must not happen for L2. Signed-off-by:
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Jan Kiszka authored
Code compiles to the same binary, but now with one warning less. Signed-off-by:
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- 27 Feb, 2015 15 commits
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Andrew Jones authored
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Andrew Jones authored
Add a common entry point, present/online cpu masks, and smp_boot_secondary() to support booting secondary cpus. Adds a bit more PSCI API that we need too. We also adjust THREAD_START_SP for arm to make some room for exception stacks. Signed-off-by:
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Andrew Jones authored
Each mode has its own stack, but we only use it as a base pointer to a private memory region. That region, which has a size of sizeof(struct pt_regs), is used to store some registers during the switch to svc mode - which will use the normal svc stack. The switch to svc mode is done because we handle all exceptions in svc. Signed-off-by:
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Andrew Jones authored
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Andrew Jones authored
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Andrew Jones authored
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Andrew Jones authored
We put this off, as it wasn't necessary without smp. Now it is. Only need to do this for arm64, as we've already done it already for arm. Signed-off-by:
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Andrew Jones authored
We introduced a variable called mmu_on to the mmu implementation because unit tests may want to run with the mmu off, yet still call into common code that could lead to {Load,Store}-Exclusive instructions - which is illegal. So, the mmu_on variable was added and made query-able (through mmu_enabled()) in order to guard those paths. But, mmu_on is really a per cpu concept, so for smp we need to change it. As it's just a bool, we can easily make it per cpu by changing it into a cpumask. We rename it more appropriately too. Signed-off-by: -
Andrew Jones authored
On smp, cpumasks become quite useful. Add a simple implementation, along with implementations of bitops it needs. Signed-off-by:
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Andrew Jones authored
Add exception handlers to thread info. And, since we allow threads running in user mode to install exception handlers too (a convenience for unit test developers), check for handlers on the user mode stack thread info too. But, unit test developers will likely also expect the installation of exception handlers done in kernel mode, before switching to user mode, to work. So, if there's no handler in the thread info hanging off the user mode stack, then still check the kernel mode stack thread info for one. Use THREAD_SIZE == PAGE_SIZE, when PAGE_SIZE is larger than 16K. This is for arm64, which uses 64K pages, because the exception handler arrays are 8K together, making the stack too small with THREAD_SIZE == 16K. Signed-off-by:
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Andrew Jones authored
While current_mode() == USR_MODE works on armv7 from PL0 to check if we're in user mode, current_mode() would require reading a privileged register on armv8. To work around this, on arm64 we introduced a 'user_mode' variable. This variable needs to be per thread now. Rather than starting to pollute thread_info with a bunch of bools, create a flags field and a TIF_USER_MODE flag to replace it. Use it on armv7 too for consistency. Also, now that we need to create a thread_info initializer, add mpidr utilities for setting thread_info->cpu. Signed-off-by:
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Andrew Jones authored
For smp we need a way to maintain thread local state. The bottom of the thread stack is a good place, and is where Linux puts it. So we just steal the concept of the thread_info structure that lives at the bottom of the stack in Linux, and introduce it to kvm-unit-tests/arm[64]. For starters we just have cpu index for state, and that's implicitly initialized to zero for CPU0 already. So, as we don't have secondary cpus yet, there's not much to do. Additionally, sneak a small fixup in to the initial stack setup for arm64. We were assuming that spsel is EL1 after reset, which has been true so far, but let's not assume. Signed-off-by:
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Andrew Jones authored
get_sp() only worked by accident, because gcc inlined calls to it. It should have always been explicitly inlined. It was also only added for debugging, and not in any use now. Furthermore, while we will have need for a "get_sp", we'll add it back with a new name, current_stack_pointer, in order to be consistent with Linux. Signed-off-by:
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Andrew Jones authored
Add 'const' to a few global arrays that are constant. Also, no need for default_vector_handler to be static. unittests may want to reset vector handlers to it. Signed-off-by:
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Andrew Jones authored
We shouldn't assume we can set tcr_el1.ips to 42 bits. Set it based on what we read from id_aa64mmfr0_el1. Didn't see a problem, but might as well be correct. Signed-off-by:
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