Commit 5ae841d1 authored by Dave Martin's avatar Dave Martin Committed by Will Deacon
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arm64: Correct ARM64_CORE_REG() size encodings for all core registers



ARM64_CORE_REG() is currently only used to generate the KVM
register IDs for registers that happen to be 64 bits in size, so
KVM_REG_SIZE_U64 is hard-coded in the definition.

To enable this macro to generate correct encodings for the FPSIMD
registers too (which are a mix of 128-bit and 32-bit registers),
this patch extends the macro to encode the correct size for each
class of register in KVM_REG_ARM_CORE.

The approach is crude, but because the KVM_REG_ARM_CORE ID
arrangement is ABI, it's not expected to evolve.
Signed-off-by: default avatarDave Martin <Dave.Martin@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 1bbe92f5
...@@ -12,8 +12,21 @@ ...@@ -12,8 +12,21 @@
#define SCTLR_EL1_E0E_MASK (1 << 24) #define SCTLR_EL1_E0E_MASK (1 << 24)
#define SCTLR_EL1_EE_MASK (1 << 25) #define SCTLR_EL1_EE_MASK (1 << 25)
#define ARM64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ static __u64 __core_reg_id(__u64 offset)
KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x)) {
__u64 id = KVM_REG_ARM64 | KVM_REG_ARM_CORE | offset;
if (offset < KVM_REG_ARM_CORE_REG(fp_regs))
id |= KVM_REG_SIZE_U64;
else if (offset < KVM_REG_ARM_CORE_REG(fp_regs.fpsr))
id |= KVM_REG_SIZE_U128;
else
id |= KVM_REG_SIZE_U32;
return id;
}
#define ARM64_CORE_REG(x) __core_reg_id(KVM_REG_ARM_CORE_REG(x))
unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu) unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu)
{ {
......
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