Commit ff01b5db authored by Jean-Philippe Brucker's avatar Jean-Philippe Brucker Committed by Will Deacon
Browse files

pci: allow to specify IRQ type for PCI devices



Currently all our virtual device interrupts are edge-triggered. But we're
going to need level-triggered interrupts when passing physical devices.
Let the device configure its interrupt kind. Keep edge as default, to
avoid changing existing users.
Reviewed-by: default avatarPunit Agrawal <punit.agrawal@arm.com>
Signed-off-by: default avatarJean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 023fdaae
......@@ -77,6 +77,7 @@ void pci__generate_fdt_nodes(void *fdt)
u8 dev_num = dev_hdr->dev_num;
u8 pin = pci_hdr->irq_pin;
u8 irq = pci_hdr->irq_line;
u32 irq_flags = pci_hdr->irq_type;
*entry = (struct of_interrupt_map_entry) {
.pci_irq_mask = {
......@@ -93,7 +94,7 @@ void pci__generate_fdt_nodes(void *fdt)
.gic_irq = {
.type = cpu_to_fdt32(GIC_FDT_IRQ_TYPE_SPI),
.num = cpu_to_fdt32(irq - GIC_SPI_IRQ_BASE),
.flags = cpu_to_fdt32(IRQ_TYPE_EDGE_RISING),
.flags = cpu_to_fdt32(irq_flags),
},
};
......
......@@ -9,6 +9,7 @@
#include "kvm/devices.h"
#include "kvm/kvm.h"
#include "kvm/msi.h"
#include "kvm/fdt.h"
/*
* PCI Configuration Mechanism #1 I/O ports. See Section 3.7.4.1.
......@@ -105,6 +106,11 @@ struct pci_device_header {
/* Private to lkvm */
u32 bar_size[6];
struct pci_config_operations cfg_ops;
/*
* PCI INTx# are level-triggered, but virtual device often feature
* edge-triggered INTx# for convenience.
*/
enum irq_type irq_type;
};
int pci__init(struct kvm *kvm);
......
......@@ -39,6 +39,9 @@ void pci__assign_irq(struct device_header *dev_hdr)
*/
pci_hdr->irq_pin = 1;
pci_hdr->irq_line = irq__alloc_line();
if (!pci_hdr->irq_type)
pci_hdr->irq_type = IRQ_TYPE_EDGE_RISING;
}
static void *pci_config_address_ptr(u16 port)
......
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