• Alexandru Elisei's avatar
    irqchip/gic-v3: Support pseudo-NMIs when SCR_EL3.FIQ == 0 · d022439c
    Alexandru Elisei authored
    
    
    The GIC's internal view of the priority mask register and the assigned
    interrupt priorities are based on whether GIC security is enabled and
    whether firmware routes Group 0 interrupts to EL3. At the moment, we
    support priority masking when ICC_PMR_EL1 and interrupt priorities are
    either both modified by the GIC, or both left unchanged.
    
    Trusted Firmware-A's default interrupt routing model allows Group 0
    interrupts to be delivered to the non-secure world (SCR_EL3.FIQ == 0).
    Unfortunately, this is precisely the case that the GIC driver doesn't
    support: ICC_PMR_EL1 remains unchanged, but the GIC's view of interrupt
    priorities is different from the software programmed values.
    
    Support pseudo-NMIs when SCR_EL3.FIQ == 0 by using a different value to
    mask regular interrupts. All the other values remain the same.
    Signed-off-by: Alexandru Elisei's avatarAlexandru Elisei <alexandru.elisei@arm.com>
    d022439c
irqflags.h 2.9 KB