• Paul Mackerras's avatar
    KVM: PPC: Book3S PR: Fix MSR setting when delivering interrupts · 916ccadc
    Paul Mackerras authored
    This makes sure that MSR "partial-function" bits are not transferred
    to SRR1 when delivering an interrupt.  This was causing failures in
    guests running kernels that include commit f3d96e69
    Overhaul handling of bad page faults", 2017-07-19), which added code
    to check bits of SRR1 on instruction storage interrupts (ISIs) that
    indicate a bad page fault.  The symptom was that a guest user program
    that handled a signal and attempted to return from the signal handler
    would get a SIGBUS signal and die.
    The code that generated ISIs and some other interrupts would
    previously set bits in the guest MSR to indicate the interrupt status
    and then call kvmppc_book3s_queue_irqprio().  This technique no
    longer works now that kvmppc_inject_interrupt() is masking off those
    bits.  Instead we make kvmppc_core_queue_data_storage() and
    kvmppc_core_queue_inst_storage() call kvmppc_inject_interrupt()
    directly, and make sure that all the places that generate ISIs or
    DSIs call kvmppc_core_queue_{data,inst}_storage instead of
    Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>