1. 01 Nov, 2019 1 commit
  2. 03 Jul, 2019 1 commit
    • Parav Pandit's avatar
      net/mlx5: Refactor mlx5_esw_query_functions for modularity · dd28087c
      Parav Pandit authored
      
      
      Functions change event output data size changes when functions other
      than VFs will be enabled in HCA CAP.
      With current API, multiple callers needs to align, calculate accurate
      size of the output data depending on number on non VF functions enabled
      in the device.
      Instead of duplicating such math at multiple places, refactor
      mlx5_esw_query_functions() to return raw output allocated by itself.
      
      Caller must free the allocated memory using kvfree() as described in the
      function comment section.
      This hides calcuation within mlx5_esw_query_functions() and provides
      simpler API.
      Signed-off-by: default avatarParav Pandit <parav@mellanox.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
      dd28087c
  3. 01 Jul, 2019 3 commits
    • Bodong Wang's avatar
      net/mlx5: E-Switch, Consolidate eswitch function number of VFs · 062f4bf4
      Bodong Wang authored
      
      
      Enabled number of VFs is key for eswich manager to do flow steering
      initialization and vport configurations. However, the number of
      enabled VFs may come from two sources as below.
      
      PF: num of VFs is provided by enabled SR-IOV of itself.
      ECPF: num of VFs is provided by enabled SR-IOV from its peer PF. And
            SR-IOV can't be enabled from ECPF itself.
      
      Current driver handles the two cases in different stages and passing
      the number of enabled VFs among a large scope of internal functions.
      It is usually hard to find out where is the real number of VFs from
      due to layers of argument pass-in.
      
      This patch consolidated that number from the entry point of doing
      eswitch setup, and maintained a copy so that eswitch functions can
      refer to it directly.
      
      Eswitch driver shall always use this number when referring to enabled
      number of VFs, don't use other numbers such as from SR-IOV.
      Signed-off-by: default avatarBodong Wang <bodong@mellanox.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
      062f4bf4
    • Bodong Wang's avatar
      net/mlx5: E-Switch, Refactor eswitch SR-IOV interface · f6455de0
      Bodong Wang authored
      
      
      Devlink eswitch mode is not necessarily related to SR-IOV, e.g, ECPF
      can be at offload mode when SR-IOV is not enabled.
      
      Rename the interface and eswitch mode names to decouple from SR-IOV,
      and cleanup eswitch messages accordingly.
      Signed-off-by: default avatarBodong Wang <bodong@mellanox.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
      f6455de0
    • Parav Pandit's avatar
      net/mlx5: Reduce dependency on enabled_vfs counter and num_vfs · d886aba6
      Parav Pandit authored
      
      
      While enabling SR-IOV, PCI core already checks that if SR-IOV is already
      enabled, it returns failure error code.
      Hence, remove such duplicate check from mlx5_core driver.
      
      While at it, make mlx5_device_disable_sriov() to perform cleanup of VFs in
      reverse order of mlx5_device_enable_sriov().
      Signed-off-by: default avatarParav Pandit <parav@mellanox.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
      d886aba6
  4. 13 Jun, 2019 1 commit
  5. 22 Mar, 2019 2 commits
  6. 14 Feb, 2019 1 commit
    • Bodong Wang's avatar
      net/mlx5: Introduce Mellanox SmartNIC and modify page management logic · 591905ba
      Bodong Wang authored
      
      
      Mellanox's SmartNIC combines embedded CPU(e.g, ARM) processing power
      with advanced network offloads to accelerate a multitude of security,
      networking and storage applications.
      
      With the introduction of the SmartNIC, there is a new PCI function
      called Embedded CPU Physical Function(ECPF). And it's possible for a
      PF to get its ICM pages from the ECPF PCI function. Driver shall
      identify if it is running on such a function by reading a bit in
      the initialization segment.
      
      When firmware asks for pages, it would issue a page request event
      specifying how many pages it requests and for which function. That
      driver responds with a manage_pages command providing the requested
      pages along with an indication for which function it is providing these
      pages.
      
      The encoding before this patch was as follows:
          function_id == 0: pages are requested for the function receiving
                            the EQE.
          function_id != 0: pages are requested for VF identified by the
                            function_id value
      
      A new one bit field in the EQE identifies that pages are requested for
      the ECPF.
      
      The notion of page_supplier can be introduced here and to support that,
      manage pages and query pages were modified so firmware can distinguish
      the following cases:
      
      1. Function provides pages for itself
      2. PF provides pages for its VF
      3. ECPF provides pages to itself
      4. ECPF provides pages for another function
      
      This distinction is possible through the introduction of the bit
      "embedded_cpu_function" in query_pages, manage_pages and page request
      EQE.
      Signed-off-by: default avatarBodong Wang <bodong@mellanox.com>
      Signed-off-by: default avatarEli Cohen <eli@mellanox.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
      591905ba
  7. 14 Dec, 2018 1 commit
  8. 26 Jun, 2018 1 commit
  9. 28 Sep, 2017 1 commit
  10. 20 Aug, 2017 1 commit
  11. 07 Aug, 2017 1 commit
  12. 27 Jul, 2017 1 commit
  13. 24 Jul, 2017 1 commit
  14. 15 Jun, 2017 1 commit
    • Moni Shoua's avatar
      net/mlx5: Undo LAG upon request to create virtual functions · 552db7bc
      Moni Shoua authored
      
      
      LAG cannot work if virtual functions are present. Therefore, if LAG is
      configured, the attempt to create virtual functions will fail. This gives
      precedence to LAG over SRIOV which is not the desired behavior as users
      might want to use the bonding/teaming driver also want to work with SRIOV.
      In that case we don't want to force an order of actions, first create
      virtual functions and only than configure a bonding/teaming net device.
      To fix, if LAG is configured during a request to create virtual
      functions, remove it and continue.
      
      We ignore ENODEV when trying to forbid lag. This makes sense
      because "No such device" means that lag is forbidden anyway.
      Signed-off-by: default avatarMoni Shoua <monis@mellanox.com>
      Reviewed-by: default avatarAviv Heller <avivh@mellanox.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
      552db7bc
  15. 11 Sep, 2016 3 commits
  16. 18 Aug, 2016 1 commit
  17. 17 Aug, 2016 1 commit
  18. 02 Jul, 2016 1 commit
  19. 18 Apr, 2016 1 commit
  20. 03 Dec, 2015 2 commits
    • Saeed Mahameed's avatar
      net/mlx5: E-Switch, Add SR-IOV (FDB) support · 81848731
      Saeed Mahameed authored
      
      
      Enabling E-Switch SRIOV for nvfs+1 vports.
      
      Create E-Switch FDB for L2 UC/MC mac steering between VFs/PF and
      external vport (Uplink).
      
      FDB contains forwarding rules such as:
      	UC MAC0 -> vport0(PF).
      	UC MAC1 -> vport1.
      	UC MAC2 -> vport2.
      	MC MACX -> vport0, vport2, Uplink.
      	MC MACY -> vport1, Uplink.
      
      For unmatched traffic FDB has the following default rules:
      	Unmached Traffic (src vport != Uplink) -> Uplink.
      	Unmached Traffic (src vport == Uplink) -> vport0(PF).
      
      FDB rules population:
      Each NIC vport (VF) will notify E-Switch manager of its UC/MC vport
      context changes via modify vport context command, which will be
      translated to an event that will be handled by E-Switch manager (PF)
      which will update FDB table accordingly.
      Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
      Signed-off-by: default avatarOr Gerlitz <ogerlitz@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      81848731
    • Eli Cohen's avatar
      net/mlx5_core: Add base sriov support · fc50db98
      Eli Cohen authored
      
      
      This patch adds SRIOV base support for mlx5 supported devices. The same
      driver is used for both PFs and VFs; VFs are identified by the driver
      through the flag MLX5_PCI_DEV_IS_VF added to the pci table entries.
      Virtual functions are created as usual through writing a value to the
      sriov_numvs sysfs file of the PF device. Upon instantiating VFs, they will
      all be probed by the driver on the hypervisor. One can gracefully unbind
      them through /sys/bus/pci/drivers/mlx5_core/unbind.
      
      mlx5_wait_for_vf_pages() was added to ensure that when a VF dies without
      executing proper teardown, the hypervisor driver waits till all of the
      pages that were allocated at the hypervisor to maintain its operation
      are returned.
      
      In order for the VF to be operational, the PF needs to call enable_hca
      for it. This can be done before the VFs are created through a call to
      pci_enable_sriov.
      
      If the there are VFs assigned to a VMs when the driver of the PF is
      unloaded, all the VF will experience system error and PF driver unloads
      cleanly; in this case pci_disable_sriov is not called and the devices
      will show when running lspci. Once the PF driver is reloaded, it will
      sync its data structures which maintain state on its VFs.
      Signed-off-by: default avatarEli Cohen <eli@mellanox.com>
      Signed-off-by: default avatarOr Gerlitz <ogerlitz@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      fc50db98