- 16 Sep, 2016 2 commits
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Gabriel Fernandez authored
This patch reworks the clock binding to avoid too much detail in DT. Now we have only compatible string per type of clock (remark from Rob https://lkml.org/lkml/2016/5/25/492 ) Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@st.com> Acked-by:
Peter Griffin <peter.griffin@linaro.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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Gabriel Fernandez authored
STiH415 and STiH416 platforms are no longer used. these platforms will be deprecated for the next kernel. Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@st.com> Acked-by:
Rob Herring <robh@kernel.org> Acked-by:
Peter Griffin <peter.griffin@linaro.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 30 Jun, 2016 1 commit
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Lee Jones authored
Utilise the new Critical Clock infrastructure to mark clocks which much not be disabled as CRITICAL. Clocks are marked as CRITICAL using clk flags. This patch also ensures flags are peculated through the framework in the correct manner. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 30 Jan, 2016 1 commit
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Arnd Bergmann authored
My previous patch fixed some warnings about printing a couple of variables that are always uninitialized in quadfs_pll_fs660c32_set_rate(), but I now got a warning that only shows up in some configurations (i.e. without gcc -Os) about the params.ndiv being used uninitialized in the error case: drivers/clk/st/clkgen-fsyn.c: In function 'quadfs_pll_fs660c32_set_rate': drivers/clk/st/clkgen-fsyn.c:584:75: warning: 'params.ndiv' may be used uninitialized in this function [-Wmaybe-uninitialized] drivers/clk/st/clkgen-fsyn.c:574:16: note: 'params.ndiv' was declared here This changes the error handling so we bail for invalid arguments rather than continuing with uninitialized data. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 20 Nov, 2015 1 commit
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Arnd Bergmann authored
quadfs_pll_fs660c32_round_rate prints a few structure members that are never initialized, and also doesn't print the only one it cares about. We get a gcc warning about the ones that are printed: clk/st/clkgen-fsyn.c:560:93: warning: 'params.sdiv' may be used uninitialized in this function clk/st/clkgen-fsyn.c:560:93: warning: 'params.mdiv' may be used uninitialized in this function clk/st/clkgen-fsyn.c:560:93: warning: 'params.pe' may be used uninitialized in this function clk/st/clkgen-fsyn.c:560:93: warning: 'params.nsdiv' may be used uninitialized in this function This changes the code to no longer print uninitialized data, and for good measure it also prints the ndiv member that is being set. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Fixes: 5f7aa907 ("clk: st: Support for QUADFS inside ClockGenB/C/D/E/F") Acked-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 17 Sep, 2015 1 commit
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Gabriel Fernandez authored
Use a generic name for this kind of PLL Correction in dts files are already done here: commit 5eb26c60 ("ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x") Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 24 Aug, 2015 1 commit
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Stephen Boyd authored
Use the provider based method to get a clock's name so that we can get rid of the clk member in struct clk_hw one day. Mostly converted with the following coccinelle script. @@ struct clk_hw *E; @@ -__clk_get_name(E->clk) +clk_hw_get_name(E) Acked-by:
Heiko Stuebner <heiko@sntech.de> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by:
Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Acked-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by:
Andrew Bresticker <abrestic@chromium.org> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kevin Cernekee <cernekee@chromium.org> Acked-by:
Geert Uytterhoeven <geert+renesas@glider.be> Cc: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: linux-omap@vger.kernel.org Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 20 Jul, 2015 1 commit
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Stephen Boyd authored
This clock provider uses the consumer API, so include clk.h explicitly. Cc: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 07 Jul, 2015 1 commit
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Pankaj Dev authored
Incorrect register offset used for sthi407 clockgenC Signed-off-by:
Pankaj Dev <pankaj.dev@st.com> Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Fixes: 51306d56 ("clk: st: STiH407: Support for clockgenC0") Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 06 Jul, 2015 3 commits
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Pankaj Dev authored
Add the CLK_GET_RATE_NOCACHE flag to all the clocks with recalc ops, so that they reflect Hw rate after CPS wake-up when a clk_get_rate() is called Signed-off-by:
Pankaj Dev <pankaj.dev@st.com> Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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Gabriel Fernandez authored
This patch fixes the value for disabling the FSYN channel clock. The 'is_enabled' returned value is also fixed. Signed-off-by:
Pankaj Dev <pankaj.dev@st.com> Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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Gabriel Fernandez authored
Remove this duplicated code due to a bad copy / paste. Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 15 May, 2015 1 commit
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Stephen Boyd authored
drivers/clk/st/clkgen-mux.c:134:4: warning: symbol 'clkgena_divmux_get_parent' was not declared. Should it be static? drivers/clk/st/clkgen-mux.c:171:15: warning: symbol 'clkgena_divmux_recalc_rate' was not declared. Should it be static? drivers/clk/st/clkgen-mux.c:218:12: warning: symbol 'clk_register_genamux' was not declared. Should it be static? drivers/clk/st/clkgen-mux.c:388:13: warning: symbol 'st_of_clkgena_divmux_setup' was not declared. Should it be static? drivers/clk/st/clkgen-mux.c:488:13: warning: symbol 'st_of_clkgena_prediv_setup' was not declared. Should it be static? drivers/clk/st/clkgen-mux.c:625:13: warning: symbol 'st_of_clkgen_mux_setup' was not declared. Should it be static? drivers/clk/st/clkgen-mux.c:702:13: warning: symbol 'st_of_clkgen_vcc_setup' was not declared. Should it be static? drivers/clk/st/clkgen-pll.c:273:15: warning: symbol 'recalc_stm_pll800c65' was not declared. Should it be static? drivers/clk/st/clkgen-pll.c:300:15: warning: symbol 'recalc_stm_pll1600c65' was not declared. Should it be static? drivers/clk/st/clkgen-pll.c:324:15: warning: symbol 'recalc_stm_pll3200c32' was not declared. Should it be static? drivers/clk/st/clkgen-pll.c:346:15: warning: symbol 'recalc_stm_pll1200c32' was not declared. Should it be static? drivers/clk/st/clkgen-pll.c:565:19: warning: incorrect type in assignment (different address spaces) drivers/clk/st/clkgen-pll.c:565:19: expected void [noderef] <asn:2>*reg drivers/clk/st/clkgen-pll.c:565:19: got void * drivers/clk/st/clkgen-pll.c:576:18: warning: incorrect type in assignment (different address spaces) drivers/clk/st/clkgen-pll.c:576:18: expected void [noderef] <asn:2>*reg drivers/clk/st/clkgen-pll.c:576:18: got void * drivers/clk/st/clkgen-pll.c:693:53: warning: incorrect type in argument 2 (different address spaces) drivers/clk/st/clkgen-pll.c:693:53: expected void *[noderef] <asn:2>reg drivers/clk/st/clkgen-pll.c:693:53: got void [noderef] <asn:2>*[assigned] pll_base drivers/clk/st/clkgen-fsyn.c:495:5: warning: symbol 'clk_fs660c32_vco_get_rate' was not declared. Should it be static? drivers/clk/st/clkgen-fsyn.c:522:5: warning: symbol 'clk_fs660c32_vco_get_params' was not declared. Should it be static? drivers/clk/st/clk-flexgen.c:119:15: warning: symbol 'flexgen_recalc_rate' was not declared. Should it be static? drivers/clk/st/clk-flexgen.c:177:12: warning: symbol 'clk_register_flexgen' was not declared. Should it be static? drivers/clk/st/clk-flexgen.c:263:13: warning: symbol 'st_of_flexgen_setup' was not declared. Should it be static? Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 01 Apr, 2015 1 commit
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Fabian Frederick authored
of_device_id is always used as const. (See driver.of_match_table and open firmware functions) __initdata updated to __initconst for static const struct of_device_id ti_clkdm_match_table[] Signed-off-by:
Fabian Frederick <fabf@skynet.be> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 29 Jul, 2014 7 commits
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Gabriel FERNANDEZ authored
This patch extend the range of possible frequencies of the fs432c65 and fs660c32 Quad frequency synthesizers. Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Acked-by:
Peter Griffin <peter.griffin@linaro.org> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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Gabriel FERNANDEZ authored
The patch added support for ClockGenD0/D2/D3 It includes one 660 Quadfs. Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by:
Olivier Bideau <olivier.bideau@st.com> Acked-by:
Peter Griffin <peter.griffin@linaro.org> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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Gabriel FERNANDEZ authored
The patch added support for DT registration of ClockGenC0 It includes 2 c32 type PLL and a 660 Quadfs. Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by:
Olivier Bideau <olivier.bideau@st.com> Acked-by:
Peter Griffin <peter.griffin@linaro.org> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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Gabriel FERNANDEZ authored
This patch adds the support of quadfs reset handling. Signed-off-by:
Olivier Bideau <olivier.bideau@st.com> Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Acked-by:
Peter Griffin <peter.griffin@linaro.org> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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Gabriel FERNANDEZ authored
This patch introduces polarity indication for pll power up bit and for standby bit in order to have same code between stih416 and stih407 boards. Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Acked-by:
Peter Griffin <peter.griffin@linaro.org> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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Gabriel FERNANDEZ authored
Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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Gabriel FERNANDEZ authored
converts stm_fs tables into static const Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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- 25 Mar, 2014 1 commit
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Gabriel FERNANDEZ authored
The patch supports the 216/432/660 type Quad Frequency Synthesizers used by ClockGenB/C/D/E/F QUADFS clock : It includes support for all 216/432/660 type Quad Frequency Synthesizers : implemented as Fixed Parent / Rate / Gate clock, with clock rate calculated reading H/w settings done at BOOT. QuadFS have 4 outputs : chan0 chan1 chan2 chan3 Signed-off-by:
Pankaj Dev <pankaj.dev@st.com> Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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