1. 02 Jun, 2018 1 commit
  2. 01 Jun, 2018 1 commit
  3. 23 May, 2018 1 commit
    • Heiko Stuebner's avatar
      clk: rockchip: remove deprecated gate-clk code and dt-binding · 1d646229
      Heiko Stuebner authored
      
      
      Initially we tried modeling clocks via the devicetree before switching
      to clocks declared in the clock drivers and only exporting specific
      ids to the devicetree.
      
      As the old code was in the kernel for 1-2 releases when the new mode
      of operation was added we kept it for backwards compatibility.
      
      That deprecation notice is in the binding since july 2014, so nearly
      4 years now and I think it's time to drop the old cruft.
      
      Especially as at the time using the mainline kernel on Rockchip devices
      was not really possible, except for experiments on the really old socs of
      the rk3066 + rk3188 line, so there shouldn't be any devicetrees still
      around that rely on that code.
      Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
      Acked-by: default avatarStephen Boyd <sboyd@kernel.org>
      Reviewed-by: default avatarRob Herring <robh@kernel.org>
      1d646229
  4. 15 May, 2018 1 commit
  5. 09 May, 2018 1 commit
  6. 08 May, 2018 1 commit
  7. 04 May, 2018 1 commit
    • Icenowy Zheng's avatar
      clk: sunxi-ng: add support for H6 PRCM CCU · b7c7b050
      Icenowy Zheng authored
      
      
      The H6 has clock/reset controls in PRCM part, like old SoCs such as H3
      and A64. However, the PRCM CCU is rearranged; the register arragement
      is now similar to the main CCU of H6, and the PRCM now has two APB
      buses to control -- one is clocked from AHB clock derivde from AR100
      clock, the other is clocked from the same mux with AR100 clock.
      Therefore a new driver is written for it.
      
      As there's no official document about the PRCM in H6, all the information
      are indirectly collected from BSP and parts of the document, and the
      information source is noted as comments in the driver's source code. If
      reliable information is provided furtherly, the driver needs to be
      rechecked.
      Signed-off-by: default avatarIcenowy Zheng <icenowy@aosc.io>
      Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
      b7c7b050
  8. 02 May, 2018 1 commit
  9. 19 Apr, 2018 1 commit
    • Jerome Brunet's avatar
      dt-bindings: clock: meson: update documentation with hhi syscon · d4740560
      Jerome Brunet authored
      
      
      The HHI register region hosts more than just clocks and needs to
      accessed drivers other than the clock controller, such as the display
      driver.
      
      This register region should be managed by syscon. It is already the case
      on gxbb/gxl and it soon will be on axg. The clock controllers must use
      this system controller instead of directly mapping the registers.
      
      This changes the bindings of gxbb and axg's clock controllers. This is
      due to an initial 'incomplete' knowledge of these SoCs, which is why the
      meson bindings are unstable ATM.
      Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
      Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
      d4740560
  10. 17 Apr, 2018 1 commit
  11. 16 Apr, 2018 1 commit
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  26. 14 Dec, 2017 1 commit
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  28. 06 Dec, 2017 1 commit
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  30. 02 Nov, 2017 3 commits
  31. 20 Oct, 2017 1 commit