- 25 May, 2018 1 commit
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kbuild test robot authored
Fixes: 9b4c412a654c ("drm/amdgpu: Add static CG control for VCN on RV") Signed-off-by:kbuild test robot <fengguang.wu@intel.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- 24 May, 2018 3 commits
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Rex Zhu authored
Enable support for dynamically powering up/down VCN on demand. Reviewed-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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Rex Zhu authored
Implement static powergating suport on VCN. Reviewed-by:
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Rex Zhu authored
Implement proper static clockgating support for VCN. Reviewed-by:
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- 18 May, 2018 1 commit
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Leo Liu authored
NO_OP register should be writen to 0 Signed-off-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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- 15 May, 2018 2 commits
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Tom St Denis authored
The callback .emit_reg_write_reg_wait was missing for vcn decode which resulted in a kernel oops. Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by:
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Alex Deucher authored
This adds support for writing and reading back using the helper since the engines doesn't have a oneshot packet. Reviewed-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
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- 14 Mar, 2018 1 commit
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Oak Zeng authored
This is preparation for sharing client ID definitions between amdgpu and amdkfd Signed-off-by:
Oak Zeng <Oak.Zeng@amd.com> Reviewed-by:
Chunming Zhou <david1.zhou@amd.com> Acked-by:
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- 19 Feb, 2018 9 commits
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Christian König authored
Stuffing the PASID mapping into the VM flush isn't flexible enough since the PASID mapping changes not as often as we need a VM flush. v2: add missing use of gmc_v7_0_emit_pasid_mapping Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Christian König authored
Keep that at a common place instead of spread over all engines. Signed-off-by:
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Christian König authored
Add emit_reg_wait implementation for VCN v1. v2: cleanup the existing code as well Signed-off-by:
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Christian König authored
That got mixed up with the encode ring function. Signed-off-by:
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Christian König authored
All HDP invalidation and most flush can now be replaced by the generic ASIC function. Signed-off-by:
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Christian König authored
Unify tlb flushing for gmc v9. Signed-off-by:
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Christian König authored
Needed for vm_flush unification. Signed-off-by:
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Christian König authored
rd the pasid from the VM code to the emit_vm_flush function and update all implementations with the new parameter. Signed-off-by:
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Christian König authored
And rename it to struct gmc_funcs. Signed-off-by:
Samuel Li <Samuel.Li@amd.com> Signed-off-by:
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- 27 Dec, 2017 1 commit
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Christian König authored
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h Signed-off-by:
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- 12 Dec, 2017 1 commit
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Christian König authored
And also provide the level for which we need a PDE. Signed-off-by:
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- 08 Dec, 2017 3 commits
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Shaoyun Liu authored
Remove the header where it's not used. Acked-by:
Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by:
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Shaoyun Liu authored
Acked-by:
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Shaoyun Liu authored
Handle dynamic offsets correctly in static arrays. Acked-by:
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- 06 Dec, 2017 4 commits
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Feifei Xu authored
Cleanup asic_reg/raven1/VCN folder. Remove unused vcn_1_0_default.h. Signed-off-by:
Feifei Xu <Feifei.Xu@amd.com> Acked-by:
Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by:
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Feifei Xu authored
Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h Signed-off-by:
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Feifei Xu authored
Remove asic_reg/vega10 folder. Signed-off-by:
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Feifei Xu authored
Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h Signed-off-by:
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- 28 Nov, 2017 1 commit
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Michel Dänzer authored
We were setting adev->uvd.irq.num_types instead. Fixes: 9b257116 ("drm/amdgpu: add vcn enc irq support") Reviewed-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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- 26 Sep, 2017 1 commit
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Monk Liu authored
Signed-off-by:
Monk Liu <Monk.Liu@amd.com> Reviewed-by:
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- 15 Jun, 2017 1 commit
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Tom St Denis authored
Signed-off-by:
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- 31 May, 2017 1 commit
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Christian König authored
Rename adjust_mc_addr to get_vm_pde and check the address bits in one place. v2: handle vcn as well, keep setting the valid bit manually, add a BUG_ON() for GMC v6, v7 and v8 as well. v3: handle vcn_v1_0_enc_ring_emit_vm_flush as well. v4: fix the BUG_ON mask for GFX6-8 Signed-off-by:
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- 24 May, 2017 10 commits
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Christian König authored
That line got missed during the merge. v2: fix vcn_v1_0_enc_ring_emit_vm_flush as well Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Hawking Zhang authored
only mmhub will be invalidated during vcn dec/enc vm flush Signed-off-by:
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Hawking Zhang authored
This got missed due to differences in the trees when raven support was merged. Signed-off-by:
ken wang <Qingqing.Wang@amd.com> Reviewed-by:
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Alex Deucher authored
Looks like a copy past issue. Reported-by:
Julia Lawall <julia.lawall@lip6.fr> Signed-off-by:
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Huang Rui authored
Signed-off-by:
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Huang Rui authored
Add sw controlled clockgating for VCN. Signed-off-by:
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Leo Liu authored
New firmware add psp header. Signed-off-by:
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Leo Liu authored
Update and enable the vcn encode IB test. Signed-off-by:
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Leo Liu authored
Wire up the callback and enable them. Signed-off-by:
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Leo Liu authored
Signed-off-by:
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