base.c 73.5 KB
Newer Older
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */
24
25
#include "priv.h"
#include "acpi.h"
26

27
#include <core/notify.h>
28
#include <core/option.h>
29

30
#include <subdev/bios.h>
31
#include <subdev/therm.h>
32
33
34
35

static DEFINE_MUTEX(nv_devices_mutex);
static LIST_HEAD(nv_devices);

36
37
static struct nvkm_device *
nvkm_device_find_locked(u64 handle)
38
{
39
	struct nvkm_device *device;
40
	list_for_each_entry(device, &nv_devices, head) {
41
42
		if (device->handle == handle)
			return device;
43
	}
44
45
46
47
48
49
50
51
52
	return NULL;
}

struct nvkm_device *
nvkm_device_find(u64 handle)
{
	struct nvkm_device *device;
	mutex_lock(&nv_devices_mutex);
	device = nvkm_device_find_locked(handle);
53
	mutex_unlock(&nv_devices_mutex);
54
	return device;
55
56
}

57
int
58
nvkm_device_list(u64 *name, int size)
59
{
60
	struct nvkm_device *device;
61
62
63
64
65
66
67
68
69
70
	int nr = 0;
	mutex_lock(&nv_devices_mutex);
	list_for_each_entry(device, &nv_devices, head) {
		if (nr++ < size)
			name[nr - 1] = device->handle;
	}
	mutex_unlock(&nv_devices_mutex);
	return nr;
}

71
72
73
static const struct nvkm_device_chip
null_chipset = {
	.name = "NULL",
74
	.bios = nvkm_bios_new,
75
76
77
78
79
};

static const struct nvkm_device_chip
nv4_chipset = {
	.name = "NV04",
80
	.bios = nvkm_bios_new,
81
	.bus = nv04_bus_new,
82
	.clk = nv04_clk_new,
83
	.devinit = nv04_devinit_new,
84
	.fb = nv04_fb_new,
85
	.i2c = nv04_i2c_new,
86
	.imem = nv04_instmem_new,
87
	.mc = nv04_mc_new,
88
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
89
	.pci = nv04_pci_new,
90
	.timer = nv04_timer_new,
91
	.disp = nv04_disp_new,
92
	.dma = nv04_dma_new,
93
	.fifo = nv04_fifo_new,
94
	.gr = nv04_gr_new,
95
	.sw = nv04_sw_new,
96
97
98
99
100
};

static const struct nvkm_device_chip
nv5_chipset = {
	.name = "NV05",
101
	.bios = nvkm_bios_new,
102
	.bus = nv04_bus_new,
103
	.clk = nv04_clk_new,
104
	.devinit = nv05_devinit_new,
105
	.fb = nv04_fb_new,
106
	.i2c = nv04_i2c_new,
107
	.imem = nv04_instmem_new,
108
	.mc = nv04_mc_new,
109
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
110
	.pci = nv04_pci_new,
111
	.timer = nv04_timer_new,
112
	.disp = nv04_disp_new,
113
	.dma = nv04_dma_new,
114
	.fifo = nv04_fifo_new,
115
	.gr = nv04_gr_new,
116
	.sw = nv04_sw_new,
117
118
119
120
121
};

static const struct nvkm_device_chip
nv10_chipset = {
	.name = "NV10",
122
	.bios = nvkm_bios_new,
123
	.bus = nv04_bus_new,
124
	.clk = nv04_clk_new,
125
	.devinit = nv10_devinit_new,
126
	.fb = nv10_fb_new,
127
	.gpio = nv10_gpio_new,
128
	.i2c = nv04_i2c_new,
129
	.imem = nv04_instmem_new,
130
	.mc = nv04_mc_new,
131
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
132
	.pci = nv04_pci_new,
133
	.timer = nv04_timer_new,
134
	.disp = nv04_disp_new,
135
	.dma = nv04_dma_new,
136
	.gr = nv10_gr_new,
137
138
139
140
141
};

static const struct nvkm_device_chip
nv11_chipset = {
	.name = "NV11",
142
	.bios = nvkm_bios_new,
143
	.bus = nv04_bus_new,
144
	.clk = nv04_clk_new,
145
	.devinit = nv10_devinit_new,
146
	.fb = nv10_fb_new,
147
	.gpio = nv10_gpio_new,
148
	.i2c = nv04_i2c_new,
149
	.imem = nv04_instmem_new,
150
	.mc = nv11_mc_new,
151
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
152
	.pci = nv04_pci_new,
153
	.timer = nv04_timer_new,
154
	.disp = nv04_disp_new,
155
	.dma = nv04_dma_new,
156
	.fifo = nv10_fifo_new,
157
	.gr = nv15_gr_new,
158
	.sw = nv10_sw_new,
159
160
161
162
163
};

static const struct nvkm_device_chip
nv15_chipset = {
	.name = "NV15",
164
	.bios = nvkm_bios_new,
165
	.bus = nv04_bus_new,
166
	.clk = nv04_clk_new,
167
	.devinit = nv10_devinit_new,
168
	.fb = nv10_fb_new,
169
	.gpio = nv10_gpio_new,
170
	.i2c = nv04_i2c_new,
171
	.imem = nv04_instmem_new,
172
	.mc = nv04_mc_new,
173
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
174
	.pci = nv04_pci_new,
175
	.timer = nv04_timer_new,
176
	.disp = nv04_disp_new,
177
	.dma = nv04_dma_new,
178
	.fifo = nv10_fifo_new,
179
	.gr = nv15_gr_new,
180
	.sw = nv10_sw_new,
181
182
183
184
185
};

static const struct nvkm_device_chip
nv17_chipset = {
	.name = "NV17",
186
	.bios = nvkm_bios_new,
187
	.bus = nv04_bus_new,
188
	.clk = nv04_clk_new,
189
	.devinit = nv10_devinit_new,
190
	.fb = nv10_fb_new,
191
	.gpio = nv10_gpio_new,
192
	.i2c = nv04_i2c_new,
193
	.imem = nv04_instmem_new,
194
	.mc = nv17_mc_new,
195
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
196
	.pci = nv04_pci_new,
197
	.timer = nv04_timer_new,
198
	.disp = nv04_disp_new,
199
	.dma = nv04_dma_new,
200
	.fifo = nv17_fifo_new,
201
	.gr = nv17_gr_new,
202
	.sw = nv10_sw_new,
203
204
205
206
207
};

static const struct nvkm_device_chip
nv18_chipset = {
	.name = "NV18",
208
	.bios = nvkm_bios_new,
209
	.bus = nv04_bus_new,
210
	.clk = nv04_clk_new,
211
	.devinit = nv10_devinit_new,
212
	.fb = nv10_fb_new,
213
	.gpio = nv10_gpio_new,
214
	.i2c = nv04_i2c_new,
215
	.imem = nv04_instmem_new,
216
	.mc = nv17_mc_new,
217
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
218
	.pci = nv04_pci_new,
219
	.timer = nv04_timer_new,
220
	.disp = nv04_disp_new,
221
	.dma = nv04_dma_new,
222
	.fifo = nv17_fifo_new,
223
	.gr = nv17_gr_new,
224
	.sw = nv10_sw_new,
225
226
227
228
229
};

static const struct nvkm_device_chip
nv1a_chipset = {
	.name = "nForce",
230
	.bios = nvkm_bios_new,
231
	.bus = nv04_bus_new,
232
	.clk = nv04_clk_new,
233
	.devinit = nv1a_devinit_new,
234
	.fb = nv1a_fb_new,
235
	.gpio = nv10_gpio_new,
236
	.i2c = nv04_i2c_new,
237
	.imem = nv04_instmem_new,
238
	.mc = nv04_mc_new,
239
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
240
	.pci = nv04_pci_new,
241
	.timer = nv04_timer_new,
242
	.disp = nv04_disp_new,
243
	.dma = nv04_dma_new,
244
	.fifo = nv10_fifo_new,
245
	.gr = nv15_gr_new,
246
	.sw = nv10_sw_new,
247
248
249
250
251
};

static const struct nvkm_device_chip
nv1f_chipset = {
	.name = "nForce2",
252
	.bios = nvkm_bios_new,
253
	.bus = nv04_bus_new,
254
	.clk = nv04_clk_new,
255
	.devinit = nv1a_devinit_new,
256
	.fb = nv1a_fb_new,
257
	.gpio = nv10_gpio_new,
258
	.i2c = nv04_i2c_new,
259
	.imem = nv04_instmem_new,
260
	.mc = nv17_mc_new,
261
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
262
	.pci = nv04_pci_new,
263
	.timer = nv04_timer_new,
264
	.disp = nv04_disp_new,
265
	.dma = nv04_dma_new,
266
	.fifo = nv17_fifo_new,
267
	.gr = nv17_gr_new,
268
	.sw = nv10_sw_new,
269
270
271
272
273
};

static const struct nvkm_device_chip
nv20_chipset = {
	.name = "NV20",
274
	.bios = nvkm_bios_new,
275
	.bus = nv04_bus_new,
276
	.clk = nv04_clk_new,
277
	.devinit = nv20_devinit_new,
278
	.fb = nv20_fb_new,
279
	.gpio = nv10_gpio_new,
280
	.i2c = nv04_i2c_new,
281
	.imem = nv04_instmem_new,
282
	.mc = nv17_mc_new,
283
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
284
	.pci = nv04_pci_new,
285
	.timer = nv04_timer_new,
286
	.disp = nv04_disp_new,
287
	.dma = nv04_dma_new,
288
	.fifo = nv17_fifo_new,
289
	.gr = nv20_gr_new,
290
	.sw = nv10_sw_new,
291
292
293
294
295
};

static const struct nvkm_device_chip
nv25_chipset = {
	.name = "NV25",
296
	.bios = nvkm_bios_new,
297
	.bus = nv04_bus_new,
298
	.clk = nv04_clk_new,
299
	.devinit = nv20_devinit_new,
300
	.fb = nv25_fb_new,
301
	.gpio = nv10_gpio_new,
302
	.i2c = nv04_i2c_new,
303
	.imem = nv04_instmem_new,
304
	.mc = nv17_mc_new,
305
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
306
	.pci = nv04_pci_new,
307
	.timer = nv04_timer_new,
308
	.disp = nv04_disp_new,
309
	.dma = nv04_dma_new,
310
	.fifo = nv17_fifo_new,
311
	.gr = nv25_gr_new,
312
	.sw = nv10_sw_new,
313
314
315
316
317
};

static const struct nvkm_device_chip
nv28_chipset = {
	.name = "NV28",
318
	.bios = nvkm_bios_new,
319
	.bus = nv04_bus_new,
320
	.clk = nv04_clk_new,
321
	.devinit = nv20_devinit_new,
322
	.fb = nv25_fb_new,
323
	.gpio = nv10_gpio_new,
324
	.i2c = nv04_i2c_new,
325
	.imem = nv04_instmem_new,
326
	.mc = nv17_mc_new,
327
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
328
	.pci = nv04_pci_new,
329
	.timer = nv04_timer_new,
330
	.disp = nv04_disp_new,
331
	.dma = nv04_dma_new,
332
	.fifo = nv17_fifo_new,
333
	.gr = nv25_gr_new,
334
	.sw = nv10_sw_new,
335
336
337
338
339
};

static const struct nvkm_device_chip
nv2a_chipset = {
	.name = "NV2A",
340
	.bios = nvkm_bios_new,
341
	.bus = nv04_bus_new,
342
	.clk = nv04_clk_new,
343
	.devinit = nv20_devinit_new,
344
	.fb = nv25_fb_new,
345
	.gpio = nv10_gpio_new,
346
	.i2c = nv04_i2c_new,
347
	.imem = nv04_instmem_new,
348
	.mc = nv17_mc_new,
349
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
350
	.pci = nv04_pci_new,
351
	.timer = nv04_timer_new,
352
	.disp = nv04_disp_new,
353
	.dma = nv04_dma_new,
354
	.fifo = nv17_fifo_new,
355
	.gr = nv2a_gr_new,
356
	.sw = nv10_sw_new,
357
358
359
360
361
};

static const struct nvkm_device_chip
nv30_chipset = {
	.name = "NV30",
362
	.bios = nvkm_bios_new,
363
	.bus = nv04_bus_new,
364
	.clk = nv04_clk_new,
365
	.devinit = nv20_devinit_new,
366
	.fb = nv30_fb_new,
367
	.gpio = nv10_gpio_new,
368
	.i2c = nv04_i2c_new,
369
	.imem = nv04_instmem_new,
370
	.mc = nv17_mc_new,
371
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
372
	.pci = nv04_pci_new,
373
	.timer = nv04_timer_new,
374
	.disp = nv04_disp_new,
375
	.dma = nv04_dma_new,
376
	.fifo = nv17_fifo_new,
377
	.gr = nv30_gr_new,
378
	.sw = nv10_sw_new,
379
380
381
382
383
};

static const struct nvkm_device_chip
nv31_chipset = {
	.name = "NV31",
384
	.bios = nvkm_bios_new,
385
	.bus = nv31_bus_new,
386
	.clk = nv04_clk_new,
387
	.devinit = nv20_devinit_new,
388
	.fb = nv30_fb_new,
389
	.gpio = nv10_gpio_new,
390
	.i2c = nv04_i2c_new,
391
	.imem = nv04_instmem_new,
392
	.mc = nv17_mc_new,
393
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
394
	.pci = nv04_pci_new,
395
	.timer = nv04_timer_new,
396
	.disp = nv04_disp_new,
397
	.dma = nv04_dma_new,
398
	.fifo = nv17_fifo_new,
399
	.gr = nv30_gr_new,
400
	.mpeg = nv31_mpeg_new,
401
	.sw = nv10_sw_new,
402
403
404
405
406
};

static const struct nvkm_device_chip
nv34_chipset = {
	.name = "NV34",
407
	.bios = nvkm_bios_new,
408
	.bus = nv31_bus_new,
409
	.clk = nv04_clk_new,
410
	.devinit = nv10_devinit_new,
411
	.fb = nv10_fb_new,
412
	.gpio = nv10_gpio_new,
413
	.i2c = nv04_i2c_new,
414
	.imem = nv04_instmem_new,
415
	.mc = nv17_mc_new,
416
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
417
	.pci = nv04_pci_new,
418
	.timer = nv04_timer_new,
419
	.disp = nv04_disp_new,
420
	.dma = nv04_dma_new,
421
	.fifo = nv17_fifo_new,
422
	.gr = nv34_gr_new,
423
	.mpeg = nv31_mpeg_new,
424
	.sw = nv10_sw_new,
425
426
427
428
429
};

static const struct nvkm_device_chip
nv35_chipset = {
	.name = "NV35",
430
	.bios = nvkm_bios_new,
431
	.bus = nv04_bus_new,
432
	.clk = nv04_clk_new,
433
	.devinit = nv20_devinit_new,
434
	.fb = nv35_fb_new,
435
	.gpio = nv10_gpio_new,
436
	.i2c = nv04_i2c_new,
437
	.imem = nv04_instmem_new,
438
	.mc = nv17_mc_new,
439
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
440
	.pci = nv04_pci_new,
441
	.timer = nv04_timer_new,
442
	.disp = nv04_disp_new,
443
	.dma = nv04_dma_new,
444
	.fifo = nv17_fifo_new,
445
	.gr = nv35_gr_new,
446
	.sw = nv10_sw_new,
447
448
449
450
451
};

static const struct nvkm_device_chip
nv36_chipset = {
	.name = "NV36",
452
	.bios = nvkm_bios_new,
453
	.bus = nv31_bus_new,
454
	.clk = nv04_clk_new,
455
	.devinit = nv20_devinit_new,
456
	.fb = nv36_fb_new,
457
	.gpio = nv10_gpio_new,
458
	.i2c = nv04_i2c_new,
459
	.imem = nv04_instmem_new,
460
	.mc = nv17_mc_new,
461
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
462
	.pci = nv04_pci_new,
463
	.timer = nv04_timer_new,
464
	.disp = nv04_disp_new,
465
	.dma = nv04_dma_new,
466
	.fifo = nv17_fifo_new,
467
	.gr = nv35_gr_new,
468
	.mpeg = nv31_mpeg_new,
469
	.sw = nv10_sw_new,
470
471
472
473
474
};

static const struct nvkm_device_chip
nv40_chipset = {
	.name = "NV40",
475
	.bios = nvkm_bios_new,
476
	.bus = nv31_bus_new,
477
	.clk = nv40_clk_new,
478
	.devinit = nv1a_devinit_new,
479
	.fb = nv40_fb_new,
480
	.gpio = nv10_gpio_new,
481
	.i2c = nv04_i2c_new,
482
	.imem = nv40_instmem_new,
483
	.mc = nv17_mc_new,
484
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
485
	.pci = nv40_pci_new,
486
	.therm = nv40_therm_new,
487
	.timer = nv40_timer_new,
488
	.volt = nv40_volt_new,
489
	.disp = nv04_disp_new,
490
	.dma = nv04_dma_new,
491
	.fifo = nv40_fifo_new,
492
	.gr = nv40_gr_new,
493
	.mpeg = nv40_mpeg_new,
494
	.pm = nv40_pm_new,
495
	.sw = nv10_sw_new,
496
497
498
499
500
};

static const struct nvkm_device_chip
nv41_chipset = {
	.name = "NV41",
501
	.bios = nvkm_bios_new,
502
	.bus = nv31_bus_new,
503
	.clk = nv40_clk_new,
504
	.devinit = nv1a_devinit_new,
505
	.fb = nv41_fb_new,
506
	.gpio = nv10_gpio_new,
507
	.i2c = nv04_i2c_new,
508
	.imem = nv40_instmem_new,
509
	.mc = nv17_mc_new,
510
	.mmu = nv41_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
511
	.pci = nv40_pci_new,
512
	.therm = nv40_therm_new,
513
	.timer = nv41_timer_new,
514
	.volt = nv40_volt_new,
515
	.disp = nv04_disp_new,
516
	.dma = nv04_dma_new,
517
	.fifo = nv40_fifo_new,
518
	.gr = nv40_gr_new,
519
	.mpeg = nv40_mpeg_new,
520
	.pm = nv40_pm_new,
521
	.sw = nv10_sw_new,
522
523
524
525
526
};

static const struct nvkm_device_chip
nv42_chipset = {
	.name = "NV42",
527
	.bios = nvkm_bios_new,
528
	.bus = nv31_bus_new,
529
	.clk = nv40_clk_new,
530
	.devinit = nv1a_devinit_new,
531
	.fb = nv41_fb_new,
532
	.gpio = nv10_gpio_new,
533
	.i2c = nv04_i2c_new,
534
	.imem = nv40_instmem_new,
535
	.mc = nv17_mc_new,
536
	.mmu = nv41_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
537
	.pci = nv40_pci_new,
538
	.therm = nv40_therm_new,
539
	.timer = nv41_timer_new,
540
	.volt = nv40_volt_new,
541
	.disp = nv04_disp_new,
542
	.dma = nv04_dma_new,
543
	.fifo = nv40_fifo_new,
544
	.gr = nv40_gr_new,
545
	.mpeg = nv40_mpeg_new,
546
	.pm = nv40_pm_new,
547
	.sw = nv10_sw_new,
548
549
550
551
552
};

static const struct nvkm_device_chip
nv43_chipset = {
	.name = "NV43",
553
	.bios = nvkm_bios_new,
554
	.bus = nv31_bus_new,
555
	.clk = nv40_clk_new,
556
	.devinit = nv1a_devinit_new,
557
	.fb = nv41_fb_new,
558
	.gpio = nv10_gpio_new,
559
	.i2c = nv04_i2c_new,
560
	.imem = nv40_instmem_new,
561
	.mc = nv17_mc_new,
562
	.mmu = nv41_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
563
	.pci = nv40_pci_new,
564
	.therm = nv40_therm_new,
565
	.timer = nv41_timer_new,
566
	.volt = nv40_volt_new,
567
	.disp = nv04_disp_new,
568
	.dma = nv04_dma_new,
569
	.fifo = nv40_fifo_new,
570
	.gr = nv40_gr_new,
571
	.mpeg = nv40_mpeg_new,
572
	.pm = nv40_pm_new,
573
	.sw = nv10_sw_new,
574
575
576
577
578
};

static const struct nvkm_device_chip
nv44_chipset = {
	.name = "NV44",
579
	.bios = nvkm_bios_new,
580
	.bus = nv31_bus_new,
581
	.clk = nv40_clk_new,
582
	.devinit = nv1a_devinit_new,
583
	.fb = nv44_fb_new,
584
	.gpio = nv10_gpio_new,
585
	.i2c = nv04_i2c_new,
586
	.imem = nv40_instmem_new,
587
	.mc = nv44_mc_new,
588
	.mmu = nv44_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
589
	.pci = nv40_pci_new,
590
	.therm = nv40_therm_new,
591
	.timer = nv41_timer_new,
592
	.volt = nv40_volt_new,
593
	.disp = nv04_disp_new,
594
	.dma = nv04_dma_new,
595
	.fifo = nv40_fifo_new,
596
	.gr = nv44_gr_new,
597
	.mpeg = nv44_mpeg_new,
598
	.pm = nv40_pm_new,
599
	.sw = nv10_sw_new,
600
601
602
603
604
};

static const struct nvkm_device_chip
nv45_chipset = {
	.name = "NV45",
605
	.bios = nvkm_bios_new,
606
	.bus = nv31_bus_new,
607
	.clk = nv40_clk_new,
608
	.devinit = nv1a_devinit_new,
609
	.fb = nv40_fb_new,
610
	.gpio = nv10_gpio_new,
611
	.i2c = nv04_i2c_new,
612
	.imem = nv40_instmem_new,
613
	.mc = nv17_mc_new,
614
	.mmu = nv04_mmu_new,
Ben Skeggs's avatar
Ben Skeggs committed
615
	.pci = nv40_pci_new,
616
	.therm = nv40_therm_new,
617
	.timer = nv41_timer_new,
618
	.volt = nv40_volt_new,
619
	.disp = nv04_disp_new,
620
	.dma = nv04_dma_new,
621
	.fifo = nv40_fifo_new,
622
	.gr = nv40_gr_new,
623
	.mpeg = nv44_mpeg_new,
624
	.pm = nv40_pm_new,
625
	.sw = nv10_sw_new,
626
627
628
629
630
};

static const struct nvkm_device_chip
nv46_chipset = {
	.name = "G72",
631
	.bios = nvkm_bios_new,
632
	.bus = nv31_bus_new,
633
	.clk = nv40_clk_new,
634
	.devinit = nv1a_devinit_new,
635
	.fb = nv46_fb_new,
636
	.gpio = nv10_gpio_new,
637
	.i2c = nv04_i2c_new,
638
	.imem = nv40_instmem_new,
639
	.mc = nv44_mc_new,
640
	.mmu = nv44_mmu_new,
641
	.pci = nv46_pci_new,
642
	.therm = nv40_therm_new,
643
	.timer = nv41_timer_new,
644
	.volt = nv40_volt_new,
645
	.disp = nv04_disp_new,
646
	.dma = nv04_dma_new,
647
	.fifo = nv40_fifo_new,
648
	.gr = nv44_gr_new,
649
	.mpeg = nv44_mpeg_new,