Commit 31557f0f authored by Jiri Pirko's avatar Jiri Pirko Committed by David S. Miller
Browse files

mlxsw: Introduce Mellanox SwitchX-2 ASIC support



Benefit from the previously introduced Mellanox Switch infrastructure and
add driver for SwitchX-2 ASIC. Note that this driver is very simple now.
It implements bare minimum for getting device to work on slow-path.
Fast-path offload functionality is going to be added soon.
Signed-off-by: default avatarJiri Pirko <jiri@mellanox.com>
Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
Signed-off-by: default avatarElad Raz <eladr@mellanox.com>
Reviewed-by: default avatarScott Feldman <sfeldma@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4ec14b76
......@@ -19,3 +19,14 @@ config MLXSW_PCI
To compile this driver as a module, choose M here: the
module will be called mlxsw_pci.
config MLXSW_SWITCHX2
tristate "Mellanox Technologies SwitchX-2 support"
depends on MLXSW_CORE && NET_SWITCHDEV
default m
---help---
This driver supports Mellanox Technologies SwitchX-2 Ethernet
Switch ASICs.
To compile this driver as a module, choose M here: the
module will be called mlxsw_switchx2.
......@@ -2,3 +2,5 @@ obj-$(CONFIG_MLXSW_CORE) += mlxsw_core.o
mlxsw_core-objs := core.o
obj-$(CONFIG_MLXSW_PCI) += mlxsw_pci.o
mlxsw_pci-objs := pci.o
obj-$(CONFIG_MLXSW_SWITCHX2) += mlxsw_switchx2.o
mlxsw_switchx2-objs := switchx2.o
......@@ -53,6 +53,8 @@
#define MODULE_MLXSW_DRIVER_ALIAS(kind) \
MODULE_ALIAS(MLXSW_MODULE_ALIAS_PREFIX kind)
#define MLXSW_DEVICE_KIND_SWITCHX2 "switchx2"
struct mlxsw_core;
struct mlxsw_driver;
struct mlxsw_bus;
......
......@@ -55,6 +55,7 @@
static const char mlxsw_pci_driver_name[] = "mlxsw_pci";
static const struct pci_device_id mlxsw_pci_id_table[] = {
{PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SWITCHX2), 0},
{0, }
};
......@@ -63,6 +64,8 @@ static struct dentry *mlxsw_pci_dbg_root;
static const char *mlxsw_pci_device_kind_get(const struct pci_device_id *id)
{
switch (id->device) {
case PCI_DEVICE_ID_MELLANOX_SWITCHX2:
return MLXSW_DEVICE_KIND_SWITCHX2;
default:
BUG();
}
......
......@@ -39,6 +39,7 @@
#include "item.h"
#define PCI_DEVICE_ID_MELLANOX_SWITCHX2 0xc738
#define MLXSW_PCI_BAR0_SIZE (1024 * 1024) /* 1MB */
#define MLXSW_PCI_PAGE_SIZE 4096
......
......@@ -51,6 +51,10 @@
#define MLXSW_PORT_MAX_PHY_PORTS 0x40
#define MLXSW_PORT_MAX_PORTS MLXSW_PORT_MAX_PHY_PORTS
#define MLXSW_PORT_DEVID_BITS_OFFSET 10
#define MLXSW_PORT_PHY_BITS_OFFSET 4
#define MLXSW_PORT_PHY_BITS_MASK (MLXSW_PORT_MAX_PHY_PORTS - 1)
#define MLXSW_PORT_CPU_PORT 0x0
#define MLXSW_PORT_DONT_CARE (MLXSW_PORT_MAX_PORTS)
......
/*
* drivers/net/ethernet/mellanox/mlxsw/switchx2.c
* Copyright (c) 2015 Mellanox Technologies. All rights reserved.
* Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
* Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
* Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the names of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* Alternatively, this software may be distributed under the terms of the
* GNU General Public License ("GPL") version 2 as published by the Free
* Software Foundation.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/slab.h>
#include <linux/device.h>
#include <linux/skbuff.h>
#include <linux/if_vlan.h>
#include <net/switchdev.h>
#include <generated/utsrelease.h>
#include "core.h"
#include "reg.h"
#include "port.h"
#include "trap.h"
#include "txheader.h"
static const char mlxsw_sx_driver_name[] = "mlxsw_switchx2";
static const char mlxsw_sx_driver_version[] = "1.0";
struct mlxsw_sx_port;
#define MLXSW_SW_HW_ID_LEN 6
struct mlxsw_sx {
struct mlxsw_sx_port **ports;
struct mlxsw_core *core;
const struct mlxsw_bus_info *bus_info;
u8 hw_id[MLXSW_SW_HW_ID_LEN];
};
struct mlxsw_sx_port_pcpu_stats {
u64 rx_packets;
u64 rx_bytes;
u64 tx_packets;
u64 tx_bytes;
struct u64_stats_sync syncp;
u32 tx_dropped;
};
struct mlxsw_sx_port {
struct net_device *dev;
struct mlxsw_sx_port_pcpu_stats __percpu *pcpu_stats;
struct mlxsw_sx *mlxsw_sx;
u8 local_port;
};
/* tx_hdr_version
* Tx header version.
* Must be set to 0.
*/
MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
/* tx_hdr_ctl
* Packet control type.
* 0 - Ethernet control (e.g. EMADs, LACP)
* 1 - Ethernet data
*/
MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
/* tx_hdr_proto
* Packet protocol type. Must be set to 1 (Ethernet).
*/
MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
/* tx_hdr_etclass
* Egress TClass to be used on the egress device on the egress port.
* The MSB is specified in the 'ctclass3' field.
* Range is 0-15, where 15 is the highest priority.
*/
MLXSW_ITEM32(tx, hdr, etclass, 0x00, 18, 3);
/* tx_hdr_swid
* Switch partition ID.
*/
MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
/* tx_hdr_port_mid
* Destination local port for unicast packets.
* Destination multicast ID for multicast packets.
*
* Control packets are directed to a specific egress port, while data
* packets are transmitted through the CPU port (0) into the switch partition,
* where forwarding rules are applied.
*/
MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
/* tx_hdr_ctclass3
* See field 'etclass'.
*/
MLXSW_ITEM32(tx, hdr, ctclass3, 0x04, 14, 1);
/* tx_hdr_rdq
* RDQ for control packets sent to remote CPU.
* Must be set to 0x1F for EMADs, otherwise 0.
*/
MLXSW_ITEM32(tx, hdr, rdq, 0x04, 9, 5);
/* tx_hdr_cpu_sig
* Signature control for packets going to CPU. Must be set to 0.
*/
MLXSW_ITEM32(tx, hdr, cpu_sig, 0x04, 0, 9);
/* tx_hdr_sig
* Stacking protocl signature. Must be set to 0xE0E0.
*/
MLXSW_ITEM32(tx, hdr, sig, 0x0C, 16, 16);
/* tx_hdr_stclass
* Stacking TClass.
*/
MLXSW_ITEM32(tx, hdr, stclass, 0x0C, 13, 3);
/* tx_hdr_emad
* EMAD bit. Must be set for EMADs.
*/
MLXSW_ITEM32(tx, hdr, emad, 0x0C, 5, 1);
/* tx_hdr_type
* 0 - Data packets
* 6 - Control packets
*/
MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
static void mlxsw_sx_txhdr_construct(struct sk_buff *skb,
const struct mlxsw_tx_info *tx_info)
{
char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
bool is_emad = tx_info->is_emad;
memset(txhdr, 0, MLXSW_TXHDR_LEN);
/* We currently set default values for the egress tclass (QoS). */
mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_0);
mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
mlxsw_tx_hdr_etclass_set(txhdr, is_emad ? MLXSW_TXHDR_ETCLASS_6 :
MLXSW_TXHDR_ETCLASS_5);
mlxsw_tx_hdr_swid_set(txhdr, 0);
mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
mlxsw_tx_hdr_ctclass3_set(txhdr, MLXSW_TXHDR_CTCLASS3);
mlxsw_tx_hdr_rdq_set(txhdr, is_emad ? MLXSW_TXHDR_RDQ_EMAD :
MLXSW_TXHDR_RDQ_OTHER);
mlxsw_tx_hdr_cpu_sig_set(txhdr, MLXSW_TXHDR_CPU_SIG);
mlxsw_tx_hdr_sig_set(txhdr, MLXSW_TXHDR_SIG);
mlxsw_tx_hdr_stclass_set(txhdr, MLXSW_TXHDR_STCLASS_NONE);
mlxsw_tx_hdr_emad_set(txhdr, is_emad ? MLXSW_TXHDR_EMAD :
MLXSW_TXHDR_NOT_EMAD);
mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
}
static int mlxsw_sx_port_admin_status_set(struct mlxsw_sx_port *mlxsw_sx_port,
bool is_up)
{
struct mlxsw_sx *mlxsw_sx = mlxsw_sx_port->mlxsw_sx;
char paos_pl[MLXSW_REG_PAOS_LEN];
mlxsw_reg_paos_pack(paos_pl, mlxsw_sx_port->local_port,
is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
MLXSW_PORT_ADMIN_STATUS_DOWN);
return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(paos), paos_pl);
}
static int mlxsw_sx_port_oper_status_get(struct mlxsw_sx_port *mlxsw_sx_port,
bool *p_is_up)
{
struct mlxsw_sx *mlxsw_sx = mlxsw_sx_port->mlxsw_sx;
char paos_pl[MLXSW_REG_PAOS_LEN];
u8 oper_status;
int err;
mlxsw_reg_paos_pack(paos_pl, mlxsw_sx_port->local_port, 0);
err = mlxsw_reg_query(mlxsw_sx->core, MLXSW_REG(paos), paos_pl);
if (err)
return err;
oper_status = mlxsw_reg_paos_oper_status_get(paos_pl);
*p_is_up = oper_status == MLXSW_PORT_ADMIN_STATUS_UP ? true : false;
return 0;
}
static int mlxsw_sx_port_mtu_set(struct mlxsw_sx_port *mlxsw_sx_port, u16 mtu)
{
struct mlxsw_sx *mlxsw_sx = mlxsw_sx_port->mlxsw_sx;
char pmtu_pl[MLXSW_REG_PMTU_LEN];
int max_mtu;
int err;
mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sx_port->local_port, 0);
err = mlxsw_reg_query(mlxsw_sx->core, MLXSW_REG(pmtu), pmtu_pl);
if (err)
return err;
max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
if (mtu > max_mtu)
return -EINVAL;
mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sx_port->local_port, mtu);
return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(pmtu), pmtu_pl);
}
static int mlxsw_sx_port_swid_set(struct mlxsw_sx_port *mlxsw_sx_port, u8 swid)
{
struct mlxsw_sx *mlxsw_sx = mlxsw_sx_port->mlxsw_sx;
char pspa_pl[MLXSW_REG_PSPA_LEN];
mlxsw_reg_pspa_pack(pspa_pl, swid, mlxsw_sx_port->local_port);
return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(pspa), pspa_pl);
}
static int mlxsw_sx_port_module_check(struct mlxsw_sx_port *mlxsw_sx_port,
bool *p_usable)
{
struct mlxsw_sx *mlxsw_sx = mlxsw_sx_port->mlxsw_sx;
char pmlp_pl[MLXSW_REG_PMLP_LEN];
int err;
mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sx_port->local_port);
err = mlxsw_reg_query(mlxsw_sx->core, MLXSW_REG(pmlp), pmlp_pl);
if (err)
return err;
*p_usable = mlxsw_reg_pmlp_width_get(pmlp_pl) ? true : false;
return 0;
}
static int mlxsw_sx_port_open(struct net_device *dev)
{
struct mlxsw_sx_port *mlxsw_sx_port = netdev_priv(dev);
int err;
err = mlxsw_sx_port_admin_status_set(mlxsw_sx_port, true);
if (err)
return err;
netif_start_queue(dev);
return 0;
}
static int mlxsw_sx_port_stop(struct net_device *dev)
{
struct mlxsw_sx_port *mlxsw_sx_port = netdev_priv(dev);
netif_stop_queue(dev);
return mlxsw_sx_port_admin_status_set(mlxsw_sx_port, false);
}
static netdev_tx_t mlxsw_sx_port_xmit(struct sk_buff *skb,
struct net_device *dev)
{
struct mlxsw_sx_port *mlxsw_sx_port = netdev_priv(dev);
struct mlxsw_sx *mlxsw_sx = mlxsw_sx_port->mlxsw_sx;
struct mlxsw_sx_port_pcpu_stats *pcpu_stats;
const struct mlxsw_tx_info tx_info = {
.local_port = mlxsw_sx_port->local_port,
.is_emad = false,
};
struct sk_buff *skb_old = NULL;
int err;
if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
struct sk_buff *skb_new;
skb_old = skb;
skb_new = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
if (!skb_new) {
this_cpu_inc(mlxsw_sx_port->pcpu_stats->tx_dropped);
dev_kfree_skb_any(skb_old);
return NETDEV_TX_OK;
}
skb = skb_new;
}
mlxsw_sx_txhdr_construct(skb, &tx_info);
err = mlxsw_core_skb_transmit(mlxsw_sx, skb, &tx_info);
if (err == -EAGAIN) {
if (skb_old)
dev_kfree_skb_any(skb);
return NETDEV_TX_BUSY;
}
if (skb_old)
dev_kfree_skb_any(skb_old);
if (!err) {
pcpu_stats = this_cpu_ptr(mlxsw_sx_port->pcpu_stats);
u64_stats_update_begin(&pcpu_stats->syncp);
pcpu_stats->tx_packets++;
pcpu_stats->tx_bytes += skb->len;
u64_stats_update_end(&pcpu_stats->syncp);
} else {
this_cpu_inc(mlxsw_sx_port->pcpu_stats->tx_dropped);
dev_kfree_skb_any(skb);
}
return NETDEV_TX_OK;
}
static int mlxsw_sx_port_change_mtu(struct net_device *dev, int mtu)
{
struct mlxsw_sx_port *mlxsw_sx_port = netdev_priv(dev);
int err;
err = mlxsw_sx_port_mtu_set(mlxsw_sx_port, mtu);
if (err)
return err;
dev->mtu = mtu;
return 0;
}
static struct rtnl_link_stats64 *
mlxsw_sx_port_get_stats64(struct net_device *dev,
struct rtnl_link_stats64 *stats)
{
struct mlxsw_sx_port *mlxsw_sx_port = netdev_priv(dev);
struct mlxsw_sx_port_pcpu_stats *p;
u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
u32 tx_dropped = 0;
unsigned int start;
int i;
for_each_possible_cpu(i) {
p = per_cpu_ptr(mlxsw_sx_port->pcpu_stats, i);
do {
start = u64_stats_fetch_begin_irq(&p->syncp);
rx_packets = p->rx_packets;
rx_bytes = p->rx_bytes;
tx_packets = p->tx_packets;
tx_bytes = p->tx_bytes;
} while (u64_stats_fetch_retry_irq(&p->syncp, start));
stats->rx_packets += rx_packets;
stats->rx_bytes += rx_bytes;
stats->tx_packets += tx_packets;
stats->tx_bytes += tx_bytes;
/* tx_dropped is u32, updated without syncp protection. */
tx_dropped += p->tx_dropped;
}
stats->tx_dropped = tx_dropped;
return stats;
}
static const struct net_device_ops mlxsw_sx_port_netdev_ops = {
.ndo_open = mlxsw_sx_port_open,
.ndo_stop = mlxsw_sx_port_stop,
.ndo_start_xmit = mlxsw_sx_port_xmit,
.ndo_change_mtu = mlxsw_sx_port_change_mtu,
.ndo_get_stats64 = mlxsw_sx_port_get_stats64,
};
static void mlxsw_sx_port_get_drvinfo(struct net_device *dev,
struct ethtool_drvinfo *drvinfo)
{
struct mlxsw_sx_port *mlxsw_sx_port = netdev_priv(dev);
struct mlxsw_sx *mlxsw_sx = mlxsw_sx_port->mlxsw_sx;
strlcpy(drvinfo->driver, mlxsw_sx_driver_name, sizeof(drvinfo->driver));
strlcpy(drvinfo->version, mlxsw_sx_driver_version,
sizeof(drvinfo->version));
snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
"%d.%d.%d",
mlxsw_sx->bus_info->fw_rev.major,
mlxsw_sx->bus_info->fw_rev.minor,
mlxsw_sx->bus_info->fw_rev.subminor);
strlcpy(drvinfo->bus_info, mlxsw_sx->bus_info->device_name,
sizeof(drvinfo->bus_info));
}
struct mlxsw_sx_port_hw_stats {
char str[ETH_GSTRING_LEN];
u64 (*getter)(char *payload);
};
static const struct mlxsw_sx_port_hw_stats mlxsw_sx_port_hw_stats[] = {
{
.str = "a_frames_transmitted_ok",
.getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
},
{
.str = "a_frames_received_ok",
.getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
},
{
.str = "a_frame_check_sequence_errors",
.getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
},
{
.str = "a_alignment_errors",
.getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
},
{
.str = "a_octets_transmitted_ok",
.getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
},
{
.str = "a_octets_received_ok",
.getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
},
{
.str = "a_multicast_frames_xmitted_ok",
.getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
},
{
.str = "a_broadcast_frames_xmitted_ok",
.getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
},
{
.str = "a_multicast_frames_received_ok",
.getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
},
{
.str = "a_broadcast_frames_received_ok",
.getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
},
{
.str = "a_in_range_length_errors",
.getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
},
{
.str = "a_out_of_range_length_field",
.getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
},
{
.str = "a_frame_too_long_errors",
.getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
},
{
.str = "a_symbol_error_during_carrier",
.getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
},
{
.str = "a_mac_control_frames_transmitted",
.getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
},
{
.str = "a_mac_control_frames_received",
.getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
},
{
.str = "a_unsupported_opcodes_received",
.getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
},
{
.str = "a_pause_mac_ctrl_frames_received",
.getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
},
{
.str = "a_pause_mac_ctrl_frames_xmitted",
.getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
},
};
#define MLXSW_SX_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sx_port_hw_stats)
static void mlxsw_sx_port_get_strings(struct net_device *dev,
u32 stringset, u8 *data)
{
u8 *p = data;
int i;
switch (stringset) {
case ETH_SS_STATS:
for (i = 0; i < MLXSW_SX_PORT_HW_STATS_LEN; i++) {
memcpy(p, mlxsw_sx_port_hw_stats[i].str,
ETH_GSTRING_LEN);
p += ETH_GSTRING_LEN;
}
break;
}
}
static void mlxsw_sx_port_get_stats(struct net_device *dev,
struct ethtool_stats *stats, u64 *data)
{
struct mlxsw_sx_port *mlxsw_sx_port = netdev_priv(dev);
struct mlxsw_sx *mlxsw_sx = mlxsw_sx_port->mlxsw_sx;
char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
int i;
int err;
mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sx_port->local_port);
err = mlxsw_reg_query(mlxsw_sx->core, MLXSW_REG(ppcnt), ppcnt_pl);
for (i = 0; i < MLXSW_SX_PORT_HW_STATS_LEN; i++)
data[i] = !err ? mlxsw_sx_port_hw_stats[i].getter(ppcnt_pl) : 0;
}
static int mlxsw_sx_port_get_sset_count(struct net_device *dev, int sset)
{
switch (sset) {
case ETH_SS_STATS:
return MLXSW_SX_PORT_HW_STATS_LEN;
default:
return -EOPNOTSUPP;
}
}
struct mlxsw_sx_port_link_mode {
u32 mask;
u32 supported;
u32 advertised