1. 18 Oct, 2018 1 commit
    • Thomas Petazzoni's avatar
      PCI: Introduce PCI bridge emulated config space common logic · 23a5fba4
      Thomas Petazzoni authored and Lorenzo Pieralisi's avatar Lorenzo Pieralisi committed
      
      
      Some PCI host controllers do not expose a configuration space for the
      root port PCI bridge. Due to this, the Marvell Armada 370/38x/XP PCI
      controller driver (pci-mvebu) emulates a root port PCI bridge
      configuration space, and uses that to (among other things) dynamically
      create the memory windows that correspond to the PCI MEM and I/O
      regions.
      
      Since we now need to add a very similar logic for the Marvell Armada
      37xx PCI controller driver (pci-aardvark), instead of duplicating the
      code, we create in this commit a common logic called pci-bridge-emul.
      
      The idea of this logic is to emulate a root port PCI bridge
      configuration space by providing configuration space read/write
      operations, and faking behind the scenes the configuration space of a
      PCI bridge. A PCI host controller driver simply has to call
      pci_bridge_emul_conf_read() and pci_bridge_emul_conf_write() to
      read/write the configuration space of the bridge.
      
      By default, the PCI bridge configuration space is simply emulated by a
      chunk of memory, but the PCI host controller can override the behavior
      of the read and write operations on a per-register basis to do
      additional actions if needed. We take care of complying with the
      behavior of the PCI configuration space registers in terms of bits
      that are read-write, read-only, reserved and write-1-to-clear.
      
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@bootlin.com>
      Signed-off-by: Lorenzo Pieralisi's avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Acked-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      23a5fba4
  2. 08 Jun, 2018 1 commit
  3. 09 May, 2018 1 commit
  4. 24 Apr, 2018 1 commit
    • Alexander Duyck's avatar
      PCI/IOV: Add pci-pf-stub driver for PFs that only enable VFs · a8ccf8a6
      Alexander Duyck authored
      
      
      Some SR-IOV PF devices provide no functionality other than acting as a
      means of enabling VFs.  For these devices, we want to enable the VFs and
      assign them to guest virtual machines, but there's no need to have a driver
      for the PF itself.
      
      Add a new pci-pf-stub driver to claim those PF devices and provide the
      generic VF enable functionality.  An administrator can use the sysfs
      "sriov_numvfs" file to enable VFs, then assign them to guests.
      
      For now I only have one example ID provided by Amazon in terms of devices
      that require this functionality.  The general idea is that in the future we
      will see other devices added as vendors come up with devices where the PF
      is more or less just a lightweight shim used to allocate VFs.
      
      Signed-off-by: default avatarAlexander Duyck <alexander.h.duyck@intel.com>
      [bhelgaas: changelog]
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: default avatarGreg Rose <gvrose8192@gmail.com>
      Reviewed-by: default avatarChristoph Hellwig <hch@lst.de>
      a8ccf8a6
  5. 31 Jan, 2018 2 commits
  6. 26 Jan, 2018 1 commit
  7. 23 Nov, 2017 1 commit
  8. 08 Nov, 2017 1 commit
  9. 05 Oct, 2017 1 commit
  10. 28 Jun, 2017 1 commit
  11. 11 Apr, 2017 1 commit
  12. 07 Mar, 2017 1 commit
  13. 21 Feb, 2017 1 commit
    • Kishon Vijay Abraham I's avatar
      PCI: Move DesignWare IP support to new drivers/pci/dwc/ directory · 950bf638
      Kishon Vijay Abraham I authored
      
      
      Group all the PCI drivers that use DesignWare core in dwc directory.
      dwc IP is capable of operating in both host mode and device mode and
      keeping it inside the *host* directory is misleading.
      
      Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarJingoo Han <jingoohan1@gmail.com>
      Acked-By: default avatarJoao Pinto <jpinto@synopsys.com>
      Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: Minghuan Lian <minghuan.Lian@freescale.com>
      Cc: Mingkai Hu <mingkai.hu@freescale.com>
      Cc: Roy Zang <tie-fei.zang@freescale.com>
      Cc: Richard Zhu <hongxing.zhu@nxp.com>
      Cc: Lucas Stach <l.stach@pengutronix.de>
      Cc: Murali Karicheri <m-karicheri2@ti.com>
      Cc: Pratyush Anand <pratyush.anand@gmail.com>
      Cc: Niklas Cassel <niklas.cassel@axis.com>
      Cc: Jesper Nilsson <jesper.nilsson@axis.com>
      Cc: Zhou Wang <wangzhou1@hisilicon.com>
      Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>
      Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
      950bf638
  14. 06 Sep, 2016 1 commit
  15. 15 Jun, 2016 1 commit
    • Arnd Bergmann's avatar
      PCI/MSI: irqchip: Fix PCI_MSI dependencies · 3ee80364
      Arnd Bergmann authored
      
      
      The PCI_MSI symbol is used inconsistently throughout the tree, with some
      drivers using 'select' and others using 'depends on', or using conditional
      selects.  This keeps causing problems; the latest one is a result of
      ARCH_ALPINE using a 'select' statement to enable its platform-specific MSI
      driver without enabling MSI:
      
        warning: (ARCH_ALPINE) selects ALPINE_MSI which has unmet direct dependencies (PCI && PCI_MSI)
        drivers/irqchip/irq-alpine-msi.c:104:15: error: variable 'alpine_msix_domain_info' has initializer but incomplete type
         static struct msi_domain_info alpine_msix_domain_info = {
      		 ^~~~~~~~~~~~~~~
        drivers/irqchip/irq-alpine-msi.c:105:2: error: unknown field 'flags' specified in initializer
          .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
          ^
        drivers/irqchip/irq-alpine-msi.c:105:11: error: 'MSI_FLAG_USE_DEF_DOM_OPS' undeclared here (not in a function)
          .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
      	     ^~~~~~~~~~~~~~~~~~~~~~~~
      
      There is little reason to enable PCI support for a platform that uses MSI
      but then leave MSI disabled at compile time.
      
      Select PCI_MSI from irqchips that implement MSI, and make PCI host bridges
      that use MSI on ARM depend on PCI_MSI_IRQ_DOMAIN.
      
      For all three architectures that support PCI_MSI_IRQ_DOMAIN (ARM, ARM64,
      X86), enable it by default whenever MSI is enabled.
      
      [bhelgaas: changelog, omit crypto config change]
      Suggested-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      3ee80364
  16. 11 May, 2016 1 commit
    • Jayachandran C's avatar
      PCI: Provide common functions for ECAM mapping · 35ff9477
      Jayachandran C authored
      
      
      Add config option PCI_ECAM and file drivers/pci/ecam.c to provide generic
      functions for accessing memory-mapped PCI config space.
      
      The API is defined in drivers/pci/ecam.h and is written to replace the API
      in drivers/pci/host/pci-host-common.h.  The file defines a new 'struct
      pci_config_window' to hold the information related to a PCI config area and
      its mapping.  This structure is expected to be used as sysdata for
      controllers that have ECAM based mapping.
      
      Helper functions are provided to setup the mapping, free the mapping and to
      implement the map_bus method in 'struct pci_ops'
      
      Signed-off-by: default avatarJayachandran C <jchandra@broadcom.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      35ff9477
  17. 21 Mar, 2016 1 commit
  18. 08 Mar, 2016 2 commits
    • Bjorn Helgaas's avatar
      PCI: Include pci/hotplug Kconfig directly from pci/Kconfig · e7e127e3
      Bjorn Helgaas authored
      
      
      Include pci/hotplug/Kconfig directly from pci/Kconfig, so arches don't
      have to source both pci/Kconfig and pci/hotplug/Kconfig.
      
      Note that this effectively adds pci/hotplug/Kconfig to the following
      arches, because they already sourced drivers/pci/Kconfig but they
      previously did not source drivers/pci/hotplug/Kconfig:
      
        alpha
        arm
        avr32
        frv
        m68k
        microblaze
        mn10300
        sparc
        unicore32
      
      Inspired-by-patch-from: Bogicevic Sasa <brutallesale@gmail.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      e7e127e3
    • Bogicevic Sasa's avatar
      PCI: Include pci/pcie/Kconfig directly from pci/Kconfig · 5f8fc432
      Bogicevic Sasa authored
      
      
      Include pci/pcie/Kconfig directly from pci/Kconfig, so arches don't
      have to source both pci/Kconfig and pci/pcie/Kconfig.
      
      Note that this effectively adds pci/pcie/Kconfig to the following
      arches, because they already sourced drivers/pci/Kconfig but they
      previously did not source drivers/pci/pcie/Kconfig:
      
        alpha
        avr32
        blackfin
        frv
        m32r
        m68k
        microblaze
        mn10300
        parisc
        sparc
        unicore32
        xtensa
      
      [bhelgaas: changelog, source pci/pcie/Kconfig at top of pci/Kconfig, whitespace]
      Signed-off-by: default avatarSasa Bogicevic <brutallesale@gmail.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      5f8fc432
  19. 16 Feb, 2016 1 commit
  20. 08 Sep, 2015 1 commit
    • Helge Deller's avatar
      PCI,parisc: Enable 64-bit bus addresses on PA-RISC · e02a653e
      Helge Deller authored
      Commit 3a9ad0b4 ("PCI: Add pci_bus_addr_t") unconditionally introduced usage of
      64-bit PCI bus addresses on all 64-bit platforms which broke PA-RISC.
      
      It turned out that due to enabling the 64-bit addresses, the PCI logic decided
      to use the GMMIO instead of the LMMIO region. This commit simply disables
      registering the GMMIO and thus we fall back to use the LMMIO region as before.
      
      Reverts commit 45ea2a5f
      
      
      ("PCI: Don't use 64-bit bus addresses on PA-RISC")
      
      To: linux-parisc@vger.kernel.org
      Cc: linux-pci@vger.kernel.org
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Meelis Roos <mroos@linux.ee>
      Cc: stable@vger.kernel.org  # v3.19+
      Signed-off-by: default avatarHelge Deller <deller@gmx.de>
      e02a653e
  21. 20 Aug, 2015 1 commit
  22. 29 May, 2015 1 commit
  23. 16 Dec, 2014 2 commits
    • Jiang Liu's avatar
      x86, irq: Make MSI and HT_IRQ indepenent of X86_IO_APIC · 2f600025
      Jiang Liu authored
      
      
      Now we have splitted functions to support MSI and HT_IRQ into vector.c,
      and they have no dependency on IOAPIC any more. So change Kconfig files
      to make MSI and HT_IRQ independent of X86_IO_APIC.
      
      Signed-off-by: default avatarJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Link: http://lkml.kernel.org/r/1414397531-28254-16-git-send-email-jiang.liu@linux.intel.com
      
      
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      2f600025
    • Jiang Liu's avatar
      PCI: Remove PCI ioapic driver · 5db66334
      Jiang Liu authored
      
      
      To support IOAPIC hotplug on x86 and IA64 platforms, OS needs to figure
      out global interrupt source number(GSI) and IOAPIC enumeration ID
      through ACPI interfaces. So BIOS must implement an ACPI IOAPIC device
      with _GSB/_UID or _MAT method to support IOAPIC hotplug. OS also needs
      to figure out base physical address to access IOAPIC registers. OS may
      get the base physical address through PCI BARs if IOAPIC device is
      visible in PCI domain, otherwise OS may get the address by ACPI _CRS
      method if IOAPIC device is hidden from PCI domain by BIOS.
      
      When adding a PCI subtree, we need to add IOAPIC devices before enabling
      all other PCI devices because other PCI devices may use the IOAPIC to
      allocate PCI interrupts.
      
      So we plan to reimplement IOAPIC driver as an ACPI instead of PCI driver
      due to:
      1) hot-pluggable IOAPIC devices are always visible in ACPI domain,
         but may or may not be visible in PCI domain.
      2) we could explicitly control the order between IOAPIC and other PCI
         devices.
      
      We also have another choice to use a PCI driver to manage IOAPIC device
      if it's visible in PCI domain and use an ACPI driver if it's only
      visible in ACPI domain. But this solution is a little complex.
      
      It shouldn't cause serious backward compatibility issues because:
      1) IOAPIC hotplug is never supported on x86 yet because it hasn't
         implemented the required acpi_register_ioapic() and
         acpi_unregister_ioapic().
      2) Currently only ACPI based IOAPIC hotplug is possible on x86 and
         IA64, we don't know other specifications and interfaces to support
         IOAPIC hotplug yet.
      3) We will reimplement an ACPI IOAPIC driver to support IOAPIC hotplug.
      
      This change also helps to get rid of the false alarm on all current
      Linux distributions:
      [    6.952497] ioapic: probe of 0000:00:05.4 failed with error -22
      [    6.959542] ioapic: probe of 0000:80:05.4 failed with error -22
      
      Signed-off-by: default avatarJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Link: http://lkml.kernel.org/r/1414387308-27148-9-git-send-email-jiang.liu@linux.intel.com
      
      
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      5db66334
  24. 23 Nov, 2014 2 commits
  25. 03 Jan, 2014 1 commit
  26. 12 Aug, 2013 1 commit
    • Thomas Petazzoni's avatar
      PCI: remove ARCH_SUPPORTS_MSI kconfig option · ebd97be6
      Thomas Petazzoni authored
      
      
      Now that we have weak versions for each of the PCI MSI architecture
      functions, we can actually build the MSI support for all platforms,
      regardless of whether they provide or not architecture-specific
      versions of those functions. For this reason, the ARCH_SUPPORTS_MSI
      hidden kconfig boolean becomes useless, and this patch gets rid of it.
      
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Acked-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Tested-by: default avatarDaniel Price <daniel.price@gmail.com>
      Tested-by: default avatarThierry Reding <thierry.reding@gmail.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: linuxppc-dev@lists.ozlabs.org
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: linux390@de.ibm.com
      Cc: linux-s390@vger.kernel.org
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: x86@kernel.org
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Fenghua Yu <fenghua.yu@intel.com>
      Cc: linux-ia64@vger.kernel.org
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: David S. Miller <davem@davemloft.net>
      Cc: sparclinux@vger.kernel.org
      Cc: Chris Metcalf <cmetcalf@tilera.com>
      Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
      ebd97be6
  27. 03 Jun, 2013 1 commit
  28. 20 May, 2013 1 commit
    • Thomas Petazzoni's avatar
      pci: PCIe driver for Marvell Armada 370/XP systems · 45361a4f
      Thomas Petazzoni authored
      
      
      This driver implements the support for the PCIe interfaces on the
      Marvell Armada 370/XP ARM SoCs. In the future, it might be extended to
      cover earlier families of Marvell SoCs, such as Dove, Orion and
      Kirkwood.
      
      The driver implements the hw_pci operations needed by the core ARM PCI
      code to setup PCI devices and get their corresponding IRQs, and the
      pci_ops operations that are used by the PCI core to read/write the
      configuration space of PCI devices.
      
      Since the PCIe interfaces of Marvell SoCs are completely separate and
      not linked together in a bus, this driver sets up an emulated PCI host
      bridge, with one PCI-to-PCI bridge as child for each hardware PCIe
      interface.
      
      In addition, this driver enumerates the different PCIe slots, and for
      those having a device plugged in, it sets up the necessary address
      decoding windows, using the mvebu-mbus driver.
      
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Acked-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
      45361a4f
  29. 10 Sep, 2012 1 commit
  30. 24 Feb, 2012 1 commit
  31. 06 Dec, 2011 1 commit
  32. 31 Oct, 2011 2 commits
  33. 14 Oct, 2011 3 commits