- 30 Jul, 2015 3 commits
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Achiad Shochat authored
It is not needed by the mlx5 Eth driver since it has a CQ per RQ/SQ. Signed-off-by:
Achiad Shochat <achiad@mellanox.com> Signed-off-by:
Amir Vadai <amirv@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Achiad Shochat authored
This field already exists under the mlx5e_params struct Signed-off-by:
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Achiad Shochat authored
The page size of the device's RQ/SQ/CQ objects is defined in 4K units regardless of the system pages size. Thus using the Linux's PAGE_SHIFT macro yields wrong device configuration in systems where PAGE_SHIFT!=12. Signed-off-by:
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- 27 Jul, 2015 6 commits
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Achiad Shochat authored
In addition to the source/destination IP which are already hashed. Only for unicast traffic for now. Signed-off-by:
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Achiad Shochat authored
No logical change in this commit. Signed-off-by:
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Achiad Shochat authored
A regular TX WQE execution involves two or more DMA reads - one to fetch the WQE, and another one per WQE gather entry. These DMA reads obviously increase the TX latency. There are two mlx5 mechanisms to bypass these DMA reads: 1) Inline WQE 2) Blue Flame (BF) An inline WQE contains a whole packet, thus saves the DMA read/s of the regular WQE gather entry/s. Inline WQE support was already added in the previous commit. A BF WQE is written directly to the device I/O mapped memory, thus enables saving the DMA read that fetches the WQE. The BF WQE I/O write must be in cache line granularity, thus uses the CPU write combining mechanism. A BF WQE I/O write acts also as a TX doorbell for notifying the device of new TX WQEs. A BF WQE is written to the same I/O mapped address as the regular TX doorbell, thus this address is being mapped twice - once by ioremap() and once by io_mapping_map_wc(). While both mechanisms reduce the TX latency, they both consume more CPU cycles than a regular WQE: - A BF WQE must still be written to host memory, in addition to being written directly to the device I/O mapped memory. - An inline WQE involves copying the SKB data into it. To handle this tradeoff, we introduce here a heuristic algorithm that strives to avoid using these two mechanisms in case the TX queue is being back-pressured by the device, and limit their usage rate otherwise. An inline WQE will always be "Blue Flamed" (written directly to the device I/O mapped memory) while a BF WQE may not be inlined (may contain gather entries). Preliminary testing using netperf UDP_RR shows that the latency goes down from 17.5us to 16.9us, while the message rate (tested with pktgen) stays the same. Signed-off-by:
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Achiad Shochat authored
AKA inline WQE. A TX latency optimization to save data gather DMA reads. Controlled by ETHTOOL_TX_COPYBREAK. Signed-off-by:
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Saeed Mahameed authored
By affinity hints and XPS, each mlx5e channel is assigned a CPU core. Channel DMA coherent memory that is written by the NIC and read by SW (e.g CQ buffer) is allocated on the NUMA node of the CPU core assigned for the channel. Channel DMA coherent memory that is written by SW and read by the NIC (e.g SQ/RQ buffer) is allocated on the NUMA node of the NIC. Doorbell record (written by SW and read by the NIC) is an exception since it is accessed by SW more frequently. Signed-off-by:
Saeed Mahameed <saeedm@mellanox.com> Signed-off-by:
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Saeed Mahameed authored
The ConnectX-4 HW implements inverted XOR8. To make it act as XOR we re-order the HW RSS indirection table. Set XOR to be the default RSS hash function and add ethtool API to control it. Signed-off-by:
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- 24 Jun, 2015 3 commits
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Achiad Shochat authored
Use container_of() instead. Signed-off-by:
Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by:
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Achiad Shochat authored
It is already assigned at mlx5e_build_rq_param() Signed-off-by:
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Saeed Mahameed authored
To save per-packet calculations, we use the following static mappings: 1) priv {channel, tc} to netdev txq (used @mlx5e_selec_queue()) 2) netdev txq to priv sq (used @mlx5e_xmit()) Thanks to these static mappings, no more need for a separate implementation of ndo_start_xmit when multiple TCs are configured. We believe the performance improvement of such separation would be negligible, if any. The previous way of dynamically calculating the above mappings required allocating more TX queues than actually used (@alloc_etherdev_mqs()), which is now no longer needed. Signed-off-by:
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- 11 Jun, 2015 7 commits
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Achiad Shochat authored
Allocate and use transport domain by the Ethernet driver code. Signed-off-by:
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Saeed Mahameed authored
When NETIF_F_SG is set, each send WQE may have a different size since each skb can have different number of fragments as of LSO header etc. This implies that a given WQE may wrap around the send queue, i.e begin at its end and continue at its start. While it is legal by the device spec, we preferred a solution that avoids it - when building of current WQE is done, if the next WQE may wrap around the send queue, fill the send queue with NOPs WQEs till its end, so that the next WQE will begin at send queue start. NOP WQE for itself cannot wrap around the send queue since it is of minimal size - 64 bytes, and all send WQEs are a multiple of that size. Signed-off-by:
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Gal Pressman authored
The Ethernet driver requires at least 3 flow table levels to operate, enforce that. Signed-off-by:
Gal Pressman <galp@mellanox.com> Signed-off-by:
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Saeed Mahameed authored
We need to resolve a HW configuration issue for enabling HW CVLAN insertion. Meanwhile, no need to implement the VLAN insertion in the driver, rather use the generic kernel VLAN insertion method. Signed-off-by:
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Saeed Mahameed authored
Enable HW cacheline start padding and align RX WQE size to cacheline while considering HW start padding. Also, fix dma_unmap call to use the correct SKB data buffer size. Signed-off-by:
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Saeed Mahameed authored
Previously we configured HW MTU to be netdev->mtu, actually we need to configure netdev->mtu + (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN). Also, query MTU can not fail, hence make the relevant helper a void functionm, add mlx5e_set_dev_port_mtu, helper function to handle MTU setting. Signed-off-by:
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Dan Carpenter authored
We return success if mlx5e_alloc_sq_db() fails but we should return an error code. Fixes: f62b8bb8 ('net/mlx5: Extend mlx5_core to support ConnectX-4 Ethernet functionality') Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Acked-by:
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- 04 Jun, 2015 3 commits
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Majd Dibbiny authored
Extend the function prototypes for max and operational mtu to take the local port number. In the Ethernet driver is this hard coded to one, since ConnectX4 Ethernet devices are always function-per-port. The IB driver also serves older devices (ConnectIB) which isn't such, and hence the part can vary. Signed-off-by:
Majd Dibbiny <majd@mellanox.com> Signed-off-by:
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Majd Dibbiny authored
Move the vport header file to be under include/linux/mlx5, such that the mlx5 IB can use it as well. Also add nic_ prefix to the vport NIC commands to differeniate between HCA vport commands and NIC vport commands. Signed-off-by:
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Haggai Abramonvsky authored
Some core helper functions were named with mlx5_ only prefix, fix that to mlx5_core_ so we're aligned with the overall scheme used for core services. Signed-off-by:
Haggai Abramovsky <hagaya@mellanox.com> Signed-off-by:
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- 31 May, 2015 1 commit
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Amir Vadai authored
This is the Ethernet part of the driver for the Mellanox ConnectX(R)-4 Single/Dual-Port Adapter supporting 100Gb/s with VPI. The driver extends the existing mlx5 driver with Ethernet functionality. This patch contains the driver entry points but does not include transmit and receive (see the previous patch in the series) routines. It also adds the option MLX5_CORE_EN to Kconfig to enable/disable the Ethernet functionality. Currently, Kconfig is programmed to make Ethernet and Infiniband functionality mutally exclusive. Also changed MLX5_INFINIBAND to be depandant on MLX5_CORE instead of selecting it, since MLX5_CORE could be selected without MLX5_INFINIBAND being selected. Signed-off-by:
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