1. 08 Mar, 2016 2 commits
    • Bjorn Helgaas's avatar
      PCI: Include pci/hotplug Kconfig directly from pci/Kconfig · e7e127e3
      Bjorn Helgaas authored
      
      
      Include pci/hotplug/Kconfig directly from pci/Kconfig, so arches don't
      have to source both pci/Kconfig and pci/hotplug/Kconfig.
      
      Note that this effectively adds pci/hotplug/Kconfig to the following
      arches, because they already sourced drivers/pci/Kconfig but they
      previously did not source drivers/pci/hotplug/Kconfig:
      
        alpha
        arm
        avr32
        frv
        m68k
        microblaze
        mn10300
        sparc
        unicore32
      
      Inspired-by-patch-from: Bogicevic Sasa <brutallesale@gmail.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      e7e127e3
    • Bogicevic Sasa's avatar
      PCI: Include pci/pcie/Kconfig directly from pci/Kconfig · 5f8fc432
      Bogicevic Sasa authored
      
      
      Include pci/pcie/Kconfig directly from pci/Kconfig, so arches don't
      have to source both pci/Kconfig and pci/pcie/Kconfig.
      
      Note that this effectively adds pci/pcie/Kconfig to the following
      arches, because they already sourced drivers/pci/Kconfig but they
      previously did not source drivers/pci/pcie/Kconfig:
      
        alpha
        avr32
        blackfin
        frv
        m32r
        m68k
        microblaze
        mn10300
        parisc
        sparc
        unicore32
        xtensa
      
      [bhelgaas: changelog, source pci/pcie/Kconfig at top of pci/Kconfig, whitespace]
      Signed-off-by: default avatarSasa Bogicevic <brutallesale@gmail.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      5f8fc432
  2. 16 Feb, 2016 1 commit
  3. 08 Sep, 2015 1 commit
    • Helge Deller's avatar
      PCI,parisc: Enable 64-bit bus addresses on PA-RISC · e02a653e
      Helge Deller authored
      Commit 3a9ad0b4 ("PCI: Add pci_bus_addr_t") unconditionally introduced usage of
      64-bit PCI bus addresses on all 64-bit platforms which broke PA-RISC.
      
      It turned out that due to enabling the 64-bit addresses, the PCI logic decided
      to use the GMMIO instead of the LMMIO region. This commit simply disables
      registering the GMMIO and thus we fall back to use the LMMIO region as before.
      
      Reverts commit 45ea2a5f
      
      
      ("PCI: Don't use 64-bit bus addresses on PA-RISC")
      
      To: linux-parisc@vger.kernel.org
      Cc: linux-pci@vger.kernel.org
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Meelis Roos <mroos@linux.ee>
      Cc: stable@vger.kernel.org  # v3.19+
      Signed-off-by: default avatarHelge Deller <deller@gmx.de>
      e02a653e
  4. 20 Aug, 2015 1 commit
  5. 29 May, 2015 1 commit
  6. 16 Dec, 2014 2 commits
    • Jiang Liu's avatar
      x86, irq: Make MSI and HT_IRQ indepenent of X86_IO_APIC · 2f600025
      Jiang Liu authored
      
      
      Now we have splitted functions to support MSI and HT_IRQ into vector.c,
      and they have no dependency on IOAPIC any more. So change Kconfig files
      to make MSI and HT_IRQ independent of X86_IO_APIC.
      Signed-off-by: default avatarJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Link: http://lkml.kernel.org/r/1414397531-28254-16-git-send-email-jiang.liu@linux.intel.com
      
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      2f600025
    • Jiang Liu's avatar
      PCI: Remove PCI ioapic driver · 5db66334
      Jiang Liu authored
      
      
      To support IOAPIC hotplug on x86 and IA64 platforms, OS needs to figure
      out global interrupt source number(GSI) and IOAPIC enumeration ID
      through ACPI interfaces. So BIOS must implement an ACPI IOAPIC device
      with _GSB/_UID or _MAT method to support IOAPIC hotplug. OS also needs
      to figure out base physical address to access IOAPIC registers. OS may
      get the base physical address through PCI BARs if IOAPIC device is
      visible in PCI domain, otherwise OS may get the address by ACPI _CRS
      method if IOAPIC device is hidden from PCI domain by BIOS.
      
      When adding a PCI subtree, we need to add IOAPIC devices before enabling
      all other PCI devices because other PCI devices may use the IOAPIC to
      allocate PCI interrupts.
      
      So we plan to reimplement IOAPIC driver as an ACPI instead of PCI driver
      due to:
      1) hot-pluggable IOAPIC devices are always visible in ACPI domain,
         but may or may not be visible in PCI domain.
      2) we could explicitly control the order between IOAPIC and other PCI
         devices.
      
      We also have another choice to use a PCI driver to manage IOAPIC device
      if it's visible in PCI domain and use an ACPI driver if it's only
      visible in ACPI domain. But this solution is a little complex.
      
      It shouldn't cause serious backward compatibility issues because:
      1) IOAPIC hotplug is never supported on x86 yet because it hasn't
         implemented the required acpi_register_ioapic() and
         acpi_unregister_ioapic().
      2) Currently only ACPI based IOAPIC hotplug is possible on x86 and
         IA64, we don't know other specifications and interfaces to support
         IOAPIC hotplug yet.
      3) We will reimplement an ACPI IOAPIC driver to support IOAPIC hotplug.
      
      This change also helps to get rid of the false alarm on all current
      Linux distributions:
      [    6.952497] ioapic: probe of 0000:00:05.4 failed with error -22
      [    6.959542] ioapic: probe of 0000:80:05.4 failed with error -22
      Signed-off-by: default avatarJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Link: http://lkml.kernel.org/r/1414387308-27148-9-git-send-email-jiang.liu@linux.intel.com
      
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      5db66334
  7. 23 Nov, 2014 2 commits
  8. 03 Jan, 2014 1 commit
  9. 12 Aug, 2013 1 commit
    • Thomas Petazzoni's avatar
      PCI: remove ARCH_SUPPORTS_MSI kconfig option · ebd97be6
      Thomas Petazzoni authored
      
      
      Now that we have weak versions for each of the PCI MSI architecture
      functions, we can actually build the MSI support for all platforms,
      regardless of whether they provide or not architecture-specific
      versions of those functions. For this reason, the ARCH_SUPPORTS_MSI
      hidden kconfig boolean becomes useless, and this patch gets rid of it.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Acked-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Tested-by: default avatarDaniel Price <daniel.price@gmail.com>
      Tested-by: default avatarThierry Reding <thierry.reding@gmail.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: linuxppc-dev@lists.ozlabs.org
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: linux390@de.ibm.com
      Cc: linux-s390@vger.kernel.org
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: x86@kernel.org
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Fenghua Yu <fenghua.yu@intel.com>
      Cc: linux-ia64@vger.kernel.org
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: David S. Miller <davem@davemloft.net>
      Cc: sparclinux@vger.kernel.org
      Cc: Chris Metcalf <cmetcalf@tilera.com>
      Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
      ebd97be6
  10. 03 Jun, 2013 1 commit
  11. 20 May, 2013 1 commit
    • Thomas Petazzoni's avatar
      pci: PCIe driver for Marvell Armada 370/XP systems · 45361a4f
      Thomas Petazzoni authored
      
      
      This driver implements the support for the PCIe interfaces on the
      Marvell Armada 370/XP ARM SoCs. In the future, it might be extended to
      cover earlier families of Marvell SoCs, such as Dove, Orion and
      Kirkwood.
      
      The driver implements the hw_pci operations needed by the core ARM PCI
      code to setup PCI devices and get their corresponding IRQs, and the
      pci_ops operations that are used by the PCI core to read/write the
      configuration space of PCI devices.
      
      Since the PCIe interfaces of Marvell SoCs are completely separate and
      not linked together in a bus, this driver sets up an emulated PCI host
      bridge, with one PCI-to-PCI bridge as child for each hardware PCIe
      interface.
      
      In addition, this driver enumerates the different PCIe slots, and for
      those having a device plugged in, it sets up the necessary address
      decoding windows, using the mvebu-mbus driver.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Acked-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
      45361a4f
  12. 10 Sep, 2012 1 commit
  13. 24 Feb, 2012 1 commit
  14. 06 Dec, 2011 1 commit
  15. 31 Oct, 2011 2 commits
  16. 14 Oct, 2011 3 commits
  17. 12 Apr, 2011 1 commit
  18. 04 Mar, 2011 1 commit
    • Narendra_K@Dell.com's avatar
      PCI: Export ACPI _DSM provided firmware instance number and string name to sysfs · 6058989b
      Narendra_K@Dell.com authored
      
      
      This patch exports ACPI _DSM (Device Specific Method) provided firmware
      instance number and string name of PCI devices as defined by 'PCI
      Firmware Specification Revision 3.1' section 4.6.7.( DSM for Naming a
      PCI or PCI Express Device Under Operating Systems) to sysfs.
      
      New files created are:
        /sys/bus/pci/devices/.../label which contains the firmware name for
      the device in question, and
        /sys/bus/pci/devices/.../acpi_index which contains the firmware device type
      instance for the given device.
      
      cat /sys/devices/pci0000:00/0000:00:01.0/0000:01:00.0/acpi_index
      1
      cat /sys/devices/pci0000:00/0000:00:01.0/0000:01:00.0/label
      Embedded Broadcom 5709C NIC 1
      
      cat /sys/devices/pci0000:00/0000:00:01.0/0000:01:00.1/acpi_index
      2
      cat /sys/devices/pci0000:00/0000:00:01.0/0000:01:00.1/label
      Embedded Broadcom 5709C NIC 2
      
      The ACPI _DSM provided firmware 'instance number' and 'string name' will
      be given priority if the firmware also provides 'SMBIOS type 41 device
      type instance and string'.
      Signed-off-by: default avatarMatthew Garrett <mjg@redhat.com>
      Signed-off-by: default avatarJordan Hargrave <jordan_hargrave@dell.com>
      Signed-off-by: default avatarNarendra K <narendra_k@dell.com>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      6058989b
  19. 05 Jan, 2011 1 commit
  20. 18 Oct, 2010 1 commit
  21. 11 May, 2010 1 commit
  22. 23 Feb, 2010 1 commit
  23. 04 Nov, 2009 2 commits
  24. 20 Mar, 2009 1 commit
  25. 07 Jan, 2009 1 commit
    • Chris Wright's avatar
      PCI: pci-stub module to reserve pci device · c70e0d9d
      Chris Wright authored
      
      
      When doing device assignment with KVM there's currently nothing to
      protect the device from having a driver in the host as well as the guest.
      This trivial module just binds the pci device on the host to a stub
      driver so that a real host driver can't bind to the device.  It has no
      pci id table, it supports only dynamic ids.
      
       # echo "8086 10f5" > /sys/bus/pci/drivers/pci-stub/new_id
       # echo -n 0000:00:19.0 > /sys/bus/pci/drivers/e1000e/unbind
       # echo -n 0000:00:19.0 > /sys/bus/pci/drivers/pci-stub/bind
       # ls -l /sys/bus/pci/devices/0000:00:19.0/driver
       lrwxrwxrwx 1 root root 0 2008-11-25 19:10 /sys/bus/pci/devices/0000:00:19.0/driver -> ../../../bus/pci/drivers/pci-stub
      
      Cc: "Kay, Allen M" <allen.m.kay@intel.com>
      Cc: "Nakajima, Jun" <jun.nakajima@intel.com>
      Signed-off-by: default avatarChris Wright <chrisw@sous-sol.org>
      Acked-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      c70e0d9d
  26. 05 Nov, 2007 1 commit
  27. 03 May, 2007 2 commits
  28. 11 Feb, 2007 1 commit
    • David S. Miller's avatar
      [SPARC64]: Add PCI MSI support on Niagara. · 35a17eb6
      David S. Miller authored
      
      
      This is kind of hokey, we could use the hardware provided facilities
      much better.
      
      MSIs are assosciated with MSI Queues.  MSI Queues generate interrupts
      when any MSI assosciated with it is signalled.  This suggests a
      two-tiered IRQ dispatch scheme:
      
      	MSI Queue interrupt --> queue interrupt handler
      		MSI dispatch --> driver interrupt handler
      
      But we just get one-level under Linux currently.  What I'd like to do
      is possibly stick the IRQ actions into a per-MSI-Queue data structure,
      and dispatch them form there, but the generic IRQ layer doesn't
      provide a way to do that right now.
      
      So, the current kludge is to "ACK" the interrupt by processing the
      MSI Queue data structures and ACK'ing them, then we run the actual
      handler like normal.
      
      We are wasting a lot of useful information, for example the MSI data
      and address are provided with ever MSI, as well as a system tick if
      available.  If we could pass this into the IRQ handler it could help
      with certain things, in particular for PCI-Express error messages.
      
      The MSI entries on sparc64 also tell you exactly which bus/device/fn
      sent the MSI, which would be great for error handling when no
      registered IRQ handler can service the interrupt.
      
      We override the disable/enable IRQ chip methods in sun4v_msi, so we
      have to call {mask,unmask}_msi_irq() directly from there.  This is
      another ugly wart.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      35a17eb6
  29. 05 Jan, 2007 1 commit
  30. 01 Dec, 2006 1 commit
  31. 30 Nov, 2006 2 commits