tmio_mmc_core.c 33.8 KB
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// SPDX-License-Identifier: GPL-2.0
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/*
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 * Driver for the MMC / SD / SDIO IP found in:
 *
 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
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 *
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 * Copyright (C) 2015-19 Renesas Electronics Corporation
 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
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 * Copyright (C) 2017 Horms Solutions, Simon Horman
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 * Copyright (C) 2011 Guennadi Liakhovetski
 * Copyright (C) 2007 Ian Molton
 * Copyright (C) 2004 Ian Molton
 *
 * This driver draws mainly on scattered spec sheets, Reverse engineering
 * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
 * support). (Further 4 bit support from a later datasheet).
 *
 * TODO:
 *   Investigate using a workqueue for PIO transfers
 *   Eliminate FIXMEs
 *   Better Power management
 *   Handle MMC errors better
 *   double buffer support
 *
 */

#include <linux/delay.h>
#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/highmem.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/mfd/tmio.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/mmc.h>
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#include <linux/mmc/slot-gpio.h>
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#include <linux/module.h>
#include <linux/pagemap.h>
#include <linux/platform_device.h>
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#include <linux/pm_qos.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <linux/mmc/sdio.h>
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#include <linux/scatterlist.h>
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#include <linux/sizes.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include "tmio_mmc.h"

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static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
				      struct mmc_data *data)
{
	if (host->dma_ops)
		host->dma_ops->start(host, data);
}

static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
{
	if (host->dma_ops)
		host->dma_ops->enable(host, enable);
}

static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
					struct tmio_mmc_data *pdata)
{
	if (host->dma_ops) {
		host->dma_ops->request(host, pdata);
	} else {
		host->chan_tx = NULL;
		host->chan_rx = NULL;
	}
}

static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
{
	if (host->dma_ops)
		host->dma_ops->release(host);
}

static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
{
	if (host->dma_ops)
		host->dma_ops->abort(host);
}

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static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
{
	if (host->dma_ops)
		host->dma_ops->dataend(host);
}

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void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
{
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	host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
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	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
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}
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EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
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void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
{
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	host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
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	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
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}
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EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
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static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
{
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	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
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}

static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
{
	host->sg_len = data->sg_len;
	host->sg_ptr = data->sg;
	host->sg_orig = data->sg;
	host->sg_off = 0;
}

static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
{
	host->sg_ptr = sg_next(host->sg_ptr);
	host->sg_off = 0;
	return --host->sg_len;
}

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#define CMDREQ_TIMEOUT	5000

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static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);

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	if (enable && !host->sdio_irq_enabled) {
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		u16 sdio_status;

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		/* Keep device active while SDIO irq is enabled */
		pm_runtime_get_sync(mmc_dev(mmc));

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		host->sdio_irq_enabled = true;
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		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
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		/* Clear obsolete interrupts before enabling */
		sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
		if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
			sdio_status |= TMIO_SDIO_SETBITS_MASK;
		sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);

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		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
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	} else if (!enable && host->sdio_irq_enabled) {
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		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
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		host->sdio_irq_enabled = false;
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		pm_runtime_mark_last_busy(mmc_dev(mmc));
		pm_runtime_put_autosuspend(mmc_dev(mmc));
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	}
}

static void tmio_mmc_reset(struct tmio_mmc_host *host)
{
	/* FIXME - should we set stop clock reg here */
	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
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	usleep_range(10000, 11000);
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	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
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	usleep_range(10000, 11000);
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	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
	}
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}

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static void tmio_mmc_hw_reset(struct mmc_host *mmc)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);

	host->reset(host);

	tmio_mmc_abort_dma(host);

	if (host->hw_reset)
		host->hw_reset(host);
}

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static void tmio_mmc_reset_work(struct work_struct *work)
{
	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
						  delayed_reset_work.work);
	struct mmc_request *mrq;
	unsigned long flags;

	spin_lock_irqsave(&host->lock, flags);
	mrq = host->mrq;

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	/*
	 * is request already finished? Since we use a non-blocking
	 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
	 * us, so, have to check for IS_ERR(host->mrq)
	 */
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	if (IS_ERR_OR_NULL(mrq) ||
	    time_is_after_jiffies(host->last_req_ts +
				  msecs_to_jiffies(CMDREQ_TIMEOUT))) {
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		spin_unlock_irqrestore(&host->lock, flags);
		return;
	}

	dev_warn(&host->pdev->dev,
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		 "timeout waiting for hardware interrupt (CMD%u)\n",
		 mrq->cmd->opcode);
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	if (host->data)
		host->data->error = -ETIMEDOUT;
	else if (host->cmd)
		host->cmd->error = -ETIMEDOUT;
	else
		mrq->cmd->error = -ETIMEDOUT;

	host->cmd = NULL;
	host->data = NULL;

	spin_unlock_irqrestore(&host->lock, flags);

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	tmio_mmc_hw_reset(host->mmc);
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	/* Ready for new calls */
	host->mrq = NULL;

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	mmc_request_done(host->mmc, mrq);
}

/* These are the bitmasks the tmio chip requires to implement the MMC response
 * types. Note that R1 and R6 are the same in this scheme. */
#define APP_CMD        0x0040
#define RESP_NONE      0x0300
#define RESP_R1        0x0400
#define RESP_R1B       0x0500
#define RESP_R2        0x0600
#define RESP_R3        0x0700
#define DATA_PRESENT   0x0800
#define TRANSFER_READ  0x1000
#define TRANSFER_MULTI 0x2000
#define SECURITY_CMD   0x4000
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#define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
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static int tmio_mmc_start_command(struct tmio_mmc_host *host,
				  struct mmc_command *cmd)
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{
	struct mmc_data *data = host->data;
	int c = cmd->opcode;

	switch (mmc_resp_type(cmd)) {
	case MMC_RSP_NONE: c |= RESP_NONE; break;
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	case MMC_RSP_R1:
	case MMC_RSP_R1_NO_CRC:
			   c |= RESP_R1;   break;
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	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
	case MMC_RSP_R2:   c |= RESP_R2;   break;
	case MMC_RSP_R3:   c |= RESP_R3;   break;
	default:
		pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
		return -EINVAL;
	}

	host->cmd = cmd;

/* FIXME - this seems to be ok commented out but the spec suggest this bit
 *         should be set when issuing app commands.
 *	if(cmd->flags & MMC_FLAG_ACMD)
 *		c |= APP_CMD;
 */
	if (data) {
		c |= DATA_PRESENT;
		if (data->blocks > 1) {
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			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
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			c |= TRANSFER_MULTI;
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			/*
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			 * Disable auto CMD12 at IO_RW_EXTENDED and
			 * SET_BLOCK_COUNT when doing multiple block transfer
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			 */
			if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
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			    (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
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				c |= NO_CMD12_ISSUE;
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		}
		if (data->flags & MMC_DATA_READ)
			c |= TRANSFER_READ;
	}

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	tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
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	/* Fire off the command */
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	sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
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	sd_ctrl_write16(host, CTL_SD_CMD, c);

	return 0;
}

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static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
				   unsigned short *buf,
				   unsigned int count)
{
	int is_read = host->data->flags & MMC_DATA_READ;
	u8  *buf8;

	/*
	 * Transfer the data
	 */
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	if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
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		u32 data = 0;
		u32 *buf32 = (u32 *)buf;
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		if (is_read)
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			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
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					   count >> 2);
		else
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			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
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					    count >> 2);

		/* if count was multiple of 4 */
		if (!(count & 0x3))
			return;

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		buf32 += count >> 2;
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		count %= 4;

		if (is_read) {
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			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
			memcpy(buf32, &data, count);
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		} else {
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			memcpy(&data, buf32, count);
			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
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		}

		return;
	}

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	if (is_read)
		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
	else
		sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);

	/* if count was even number */
	if (!(count & 0x1))
		return;

	/* if count was odd number */
	buf8 = (u8 *)(buf + (count >> 1));

	/*
	 * FIXME
	 *
	 * driver and this function are assuming that
	 * it is used as little endian
	 */
	if (is_read)
		*buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
	else
		sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
}

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/*
 * This chip always returns (at least?) as much data as you ask for.
 * I'm unsure what happens if you ask for less than a block. This should be
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 * looked into to ensure that a funny length read doesn't hose the controller.
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 */
static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
{
	struct mmc_data *data = host->data;
	void *sg_virt;
	unsigned short *buf;
	unsigned int count;
	unsigned long flags;

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	if (host->dma_on) {
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		pr_err("PIO IRQ in DMA mode!\n");
		return;
	} else if (!data) {
		pr_debug("Spurious PIO IRQ\n");
		return;
	}

	sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
	buf = (unsigned short *)(sg_virt + host->sg_off);

	count = host->sg_ptr->length - host->sg_off;
	if (count > data->blksz)
		count = data->blksz;

	pr_debug("count: %08x offset: %08x flags %08x\n",
		 count, host->sg_off, data->flags);

	/* Transfer the data */
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	tmio_mmc_transfer_data(host, buf, count);
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	host->sg_off += count;

	tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);

	if (host->sg_off == host->sg_ptr->length)
		tmio_mmc_next_sg(host);
}

static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
{
	if (host->sg_ptr == &host->bounce_sg) {
		unsigned long flags;
		void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
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		memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
		tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
	}
}

/* needs to be called with host->lock held */
void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
{
	struct mmc_data *data = host->data;
	struct mmc_command *stop;

	host->data = NULL;

	if (!data) {
		dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
		return;
	}
	stop = data->stop;

	/* FIXME - return correct transfer count on errors */
	if (!data->error)
		data->bytes_xfered = data->blocks * data->blksz;
	else
		data->bytes_xfered = 0;

	pr_debug("Completed data request\n");

	/*
	 * FIXME: other drivers allow an optional stop command of any given type
	 *        which we dont do, as the chip can auto generate them.
	 *        Perhaps we can be smarter about when to use auto CMD12 and
	 *        only issue the auto request when we know this is the desired
	 *        stop command, allowing fallback to the stop command the
	 *        upper layers expect. For now, we do what works.
	 */

	if (data->flags & MMC_DATA_READ) {
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		if (host->dma_on)
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			tmio_mmc_check_bounce_buffer(host);
		dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
			host->mrq);
	} else {
		dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
			host->mrq);
	}

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	if (stop && !host->mrq->sbc) {
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		if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
			dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
				stop->opcode, stop->arg);

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		/* fill in response from auto CMD12 */
		stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);

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		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
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	}

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	schedule_work(&host->done);
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}
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EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
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static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
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{
	struct mmc_data *data;
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	spin_lock(&host->lock);
	data = host->data;

	if (!data)
		goto out;

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	if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
	    stat & TMIO_STAT_TXUNDERRUN)
		data->error = -EILSEQ;
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	if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
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		u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
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		bool done = false;

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		/*
		 * Has all data been written out yet? Testing on SuperH showed,
		 * that in most cases the first interrupt comes already with the
		 * BUSY status bit clear, but on some operations, like mount or
		 * in the beginning of a write / sync / umount, there is one
		 * DATAEND interrupt with the BUSY bit set, in this cases
		 * waiting for one more interrupt fixes the problem.
		 */
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		if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
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			if (status & TMIO_STAT_SCLKDIVEN)
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				done = true;
		} else {
			if (!(status & TMIO_STAT_CMD_BUSY))
				done = true;
		}

		if (done) {
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			tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
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			tmio_mmc_dataend_dma(host);
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		}
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	} else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
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		tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
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		tmio_mmc_dataend_dma(host);
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	} else {
		tmio_mmc_do_data_irq(host);
		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
	}
out:
	spin_unlock(&host->lock);
}

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static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
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{
	struct mmc_command *cmd = host->cmd;
	int i, addr;

	spin_lock(&host->lock);

	if (!host->cmd) {
		pr_debug("Spurious CMD irq\n");
		goto out;
	}

	/* This controller is sicker than the PXA one. Not only do we need to
	 * drop the top 8 bits of the first response word, we also need to
	 * modify the order of the response for short response command types.
	 */

	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
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		cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
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	if (cmd->flags &  MMC_RSP_136) {
		cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
		cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
		cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
		cmd->resp[3] <<= 8;
	} else if (cmd->flags & MMC_RSP_R3) {
		cmd->resp[0] = cmd->resp[3];
	}

	if (stat & TMIO_STAT_CMDTIMEOUT)
		cmd->error = -ETIMEDOUT;
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	else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
		 stat & TMIO_STAT_STOPBIT_ERR ||
		 stat & TMIO_STAT_CMD_IDX_ERR)
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		cmd->error = -EILSEQ;

	/* If there is data to handle we enable data IRQs here, and
	 * we will ultimatley finish the request in the data_end handler.
	 * If theres no data or we encountered an error, finish now.
	 */
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	if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
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		if (host->data->flags & MMC_DATA_READ) {
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			if (!host->dma_on) {
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				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
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			} else {
				tmio_mmc_disable_mmc_irqs(host,
							  TMIO_MASK_READOP);
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				tasklet_schedule(&host->dma_issue);
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			}
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		} else {
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			if (!host->dma_on) {
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				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
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			} else {
				tmio_mmc_disable_mmc_irqs(host,
							  TMIO_MASK_WRITEOP);
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				tasklet_schedule(&host->dma_issue);
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			}
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		}
	} else {
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		schedule_work(&host->done);
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	}

out:
	spin_unlock(&host->lock);
}

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static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
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				       int ireg, int status)
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{
	struct mmc_host *mmc = host->mmc;
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	/* Card insert / remove attempts */
	if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
			TMIO_STAT_CARD_REMOVE);
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		if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
		     ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
		    !work_pending(&mmc->detect.work))
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			mmc_detect_change(host->mmc, msecs_to_jiffies(100));
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		return true;
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	}

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	return false;
}

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static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
				  int status)
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{
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	/* Command completion */
	if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
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		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
				      TMIO_STAT_CMDTIMEOUT);
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		tmio_mmc_cmd_irq(host, status);
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		return true;
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	}
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	/* Data transfer */
	if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
		tmio_mmc_pio_irq(host);
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		return true;
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	}
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	/* Data transfer completion */
	if (ireg & TMIO_STAT_DATAEND) {
		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
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		tmio_mmc_data_irq(host, status);
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		return true;
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	}
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	return false;
}

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static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
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{
	struct mmc_host *mmc = host->mmc;
	struct tmio_mmc_data *pdata = host->pdata;
	unsigned int ireg, status;
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	unsigned int sdio_status;
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	if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
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		return false;
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	status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
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	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
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	sdio_status = status & ~TMIO_SDIO_MASK_ALL;
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	if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
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		sdio_status |= TMIO_SDIO_SETBITS_MASK;
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	sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
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	if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
		mmc_signal_sdio_irq(mmc);
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	return ireg;
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}

irqreturn_t tmio_mmc_irq(int irq, void *devid)
{
	struct tmio_mmc_host *host = devid;
	unsigned int ireg, status;

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	status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
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	ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;

	/* Clear the status except the interrupt status */
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	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
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	if (__tmio_mmc_card_detect_irq(host, ireg, status))
		return IRQ_HANDLED;
	if (__tmio_mmc_sdcard_irq(host, ireg, status))
		return IRQ_HANDLED;

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	if (__tmio_mmc_sdio_irq(host))
		return IRQ_HANDLED;
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	return IRQ_NONE;
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}
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EXPORT_SYMBOL_GPL(tmio_mmc_irq);
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static int tmio_mmc_start_data(struct tmio_mmc_host *host,
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			       struct mmc_data *data)
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{
	struct tmio_mmc_data *pdata = host->pdata;

	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
		 data->blksz, data->blocks);

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	/* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
	if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
	    host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
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		int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;

		if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
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			pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
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			       mmc_hostname(host->mmc), data->blksz);
			return -EINVAL;
		}
	}

	tmio_mmc_init_sg(host, data);
	host->data = data;
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	host->dma_on = false;
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	/* Set transfer length / blocksize */
	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
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	if (host->mmc->max_blk_count >= SZ_64K)
		sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
	else
		sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
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	tmio_mmc_start_dma(host, data);

	return 0;
}

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static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);
	int i, ret = 0;

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	if (!host->init_tuning || !host->select_tuning)
		/* Tuning is not supported */
		goto out;
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	host->tap_num = host->init_tuning(host);
	if (!host->tap_num)
		/* Tuning is not supported */
		goto out;
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	if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
		dev_warn_once(&host->pdev->dev,
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			"Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
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		goto out;
	}

	bitmap_zero(host->taps, host->tap_num * 2);

	/* Issue CMD19 twice for each tap */
	for (i = 0; i < 2 * host->tap_num; i++) {
		if (host->prepare_tuning)
			host->prepare_tuning(host, i % host->tap_num);

		ret = mmc_send_tuning(mmc, opcode, NULL);
		if (ret == 0)
			set_bit(i, host->taps);
	}

	ret = host->select_tuning(host);

out:
	if (ret < 0) {
		dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
		tmio_mmc_hw_reset(mmc);
	}

	return ret;
}

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static void tmio_process_mrq(struct tmio_mmc_host *host,
			     struct mmc_request *mrq)
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{
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	struct mmc_command *cmd;
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	int ret;

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	if (mrq->sbc && host->cmd != mrq->sbc) {
		cmd = mrq->sbc;
	} else {
		cmd = mrq->cmd;
		if (mrq->data) {
			ret = tmio_mmc_start_data(host, mrq->data);
			if (ret)
				goto fail;
		}
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	}

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	ret = tmio_mmc_start_command(host, cmd);
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	if (ret)
		goto fail;

	schedule_delayed_work(&host->delayed_reset_work,
			      msecs_to_jiffies(CMDREQ_TIMEOUT));
	return;

fail:
	host->mrq = NULL;
	mrq->cmd->error = ret;
	mmc_request_done(host->mmc, mrq);
}

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/* Process requests from the MMC layer */
static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);
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	unsigned long flags;
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	spin_lock_irqsave(&host->lock, flags);

	if (host->mrq) {
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		pr_debug("request not null\n");
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		if (IS_ERR(host->mrq)) {
			spin_unlock_irqrestore(&host->lock, flags);
			mrq->cmd->error = -EAGAIN;
			mmc_request_done(mmc, mrq);
			return;
		}
	}
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	host->last_req_ts = jiffies;
	wmb();
	host->mrq = mrq;

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	spin_unlock_irqrestore(&host->lock, flags);

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	tmio_process_mrq(host, mrq);
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}

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static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
{
	struct mmc_request *mrq;
	unsigned long flags;

	spin_lock_irqsave(&host->lock, flags);

	mrq = host->mrq;
	if (IS_ERR_OR_NULL(mrq)) {
		spin_unlock_irqrestore(&host->lock, flags);
		return;
	}

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	/* If not SET_BLOCK_COUNT, clear old data */
	if (host->cmd != mrq->sbc) {
		host->cmd = NULL;
		host->data = NULL;
		host->mrq = NULL;
	}
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	cancel_delayed_work(&host->delayed_reset_work);

	spin_unlock_irqrestore(&host->lock, flags);

	if (mrq->cmd->error || (mrq->data && mrq->data->error))
		tmio_mmc_abort_dma(host);

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	/* SCC error means retune, but executed command was still successful */
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	if (host->check_scc_error && host->check_scc_error(host))
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		mmc_retune_needed(host->mmc);
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	/* If SET_BLOCK_COUNT, continue with main command */
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	if (host->mrq && !mrq->cmd->error) {
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		tmio_process_mrq(host, mrq);
		return;
	}

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	mmc_request_done(host->mmc, mrq);
}

static void tmio_mmc_done_work(struct work_struct *work)
{
	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
						  done);
	tmio_mmc_finish_request(host);
}

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static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
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{
	struct mmc_host *mmc = host->mmc;
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	int ret = 0;

	/* .set_ios() is returning void, so, no chance to report an error */
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	if (host->set_pwr)
		host->set_pwr(host->pdev, 1);

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	if (!IS_ERR(mmc->supply.vmmc)) {
		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
		/*
		 * Attention: empiric value. With a b43 WiFi SDIO card this
		 * delay proved necessary for reliable card-insertion probing.
		 * 100us were not enough. Is this the same 140us delay, as in
		 * tmio_mmc_set_ios()?
		 */
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		usleep_range(200, 300);
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	}
	/*
	 * It seems, VccQ should be switched on after Vcc, this is also what the
	 * omap_hsmmc.c driver does.
	 */
	if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
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		ret = regulator_enable(mmc->supply.vqmmc);
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		usleep_range(200, 300);
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	}
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	if (ret < 0)
		dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
			ret);
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}

static void tmio_mmc_power_off(struct tmio_mmc_host *host)
{
	struct mmc_host *mmc = host->mmc;

	if (!IS_ERR(mmc->supply.vqmmc))
		regulator_disable(mmc->supply.vqmmc);

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	if (!IS_ERR(mmc->supply.vmmc))
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		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
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	if (host->set_pwr)
		host->set_pwr(host->pdev, 0);
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}

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static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
914
				   unsigned char bus_width)
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{
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	u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
				& ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);

	/* reg now applies to MMC_BUS_WIDTH_4 */
	if (bus_width == MMC_BUS_WIDTH_1)
		reg |= CARD_OPT_WIDTH;
	else if (bus_width == MMC_BUS_WIDTH_8)
		reg |= CARD_OPT_WIDTH8;

	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
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}

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/* Set MMC clock / power.
 * Note: This controller uses a simple divider scheme therefore it cannot
 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
 * slowest setting.
 */
static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);
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	struct device *dev = &host->pdev->dev;
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	unsigned long flags;

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	mutex_lock(&host->ios_lock);

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	spin_lock_irqsave(&host->lock, flags);
	if (host->mrq) {
		if (IS_ERR(host->mrq)) {
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			dev_dbg(dev,
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				"%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
				current->comm, task_pid_nr(current),
				ios->clock, ios->power_mode);
			host->mrq = ERR_PTR(-EINTR);
		} else {
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			dev_dbg(dev,
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				"%s.%d: CMD%u active since %lu, now %lu!\n",
				current->comm, task_pid_nr(current),
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				host->mrq->cmd->opcode, host->last_req_ts,
				jiffies);
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		}
		spin_unlock_irqrestore(&host->lock, flags);
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		mutex_unlock(&host->ios_lock);
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		return;
	}

	host->mrq = ERR_PTR(-EBUSY);

	spin_unlock_irqrestore(&host->lock, flags);
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	switch (ios->power_mode) {
	case MMC_POWER_OFF:
		tmio_mmc_power_off(host);
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		host->set_clock(host, 0);
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		break;
	case MMC_POWER_UP:
		tmio_mmc_power_on(host, ios->vdd);
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		host->set_clock(host, ios->clock);
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		tmio_mmc_set_bus_width(host, ios->bus_width);
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		break;
	case MMC_POWER_ON:
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		host->set_clock(host, ios->clock);
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		tmio_mmc_set_bus_width(host, ios->bus_width);
		break;
	}
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	/* Let things settle. delay taken from winCE driver */
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	usleep_range(140, 200);
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	if (PTR_ERR(host->mrq) == -EINTR)
		dev_dbg(&host->pdev->dev,
			"%s.%d: IOS interrupted: clk %u, mode %u",
			current->comm, task_pid_nr(current),
			ios->clock, ios->power_mode);
	host->mrq = NULL;
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	host->clk_cache = ios->clock;

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	mutex_unlock(&host->ios_lock);
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}

static int tmio_mmc_get_ro(struct mmc_host *mmc)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);
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	return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
		 TMIO_STAT_WRPROTECT);
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}

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static int tmio_mmc_get_cd(struct mmc_host *mmc)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);

	return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
		  TMIO_STAT_SIGSTATE);
}

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static int tmio_multi_io_quirk(struct mmc_card *card,
			       unsigned int direction, int blk_size)
{
	struct tmio_mmc_host *host = mmc_priv(card->host);

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	if (host->multi_io_quirk)
		return host->multi_io_quirk(card, direction, blk_size);
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	return blk_size;
}

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static int tmio_mmc_prepare_hs400_tuning(struct mmc_host *mmc,
					 struct mmc_ios *ios)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);

	if (host->prepare_hs400_tuning)
		host->prepare_hs400_tuning(host);

	return 0;
}

static void tmio_mmc_hs400_downgrade(struct mmc_host *mmc)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);

	if (host->hs400_downgrade)
		host->hs400_downgrade(host);
}

static void tmio_mmc_hs400_complete(struct mmc_host *mmc)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);

	if (host->hs400_complete)
		host->hs400_complete(host);
}

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static const struct mmc_host_ops tmio_mmc_ops = {
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	.request	= tmio_mmc_request,
	.set_ios	= tmio_mmc_set_ios,
	.get_ro         = tmio_mmc_get_ro,
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	.get_cd		= tmio_mmc_get_cd,
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	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
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	.multi_io_quirk	= tmio_multi_io_quirk,
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	.hw_reset	= tmio_mmc_hw_reset,
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	.execute_tuning = tmio_mmc_execute_tuning,
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	.prepare_hs400_tuning = tmio_mmc_prepare_hs400_tuning,
	.hs400_downgrade = tmio_mmc_hs400_downgrade,
	.hs400_complete	= tmio_mmc_hs400_complete,
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};

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static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
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{
	struct tmio_mmc_data *pdata = host->pdata;
	struct mmc_host *mmc = host->mmc;
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	int err;
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	err = mmc_regulator_get_supply(mmc);
	if (err)
		return err;
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	/* use ocr_mask if no regulator */
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	if (!mmc->ocr_avail)
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		mmc->ocr_avail = pdata->ocr_mask;
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	/*
	 * try again.
	 * There is possibility that regulator has not been probed
	 */
	if (!mmc->ocr_avail)
		return -EPROBE_DEFER;

	return 0;
1087
1088
}

1089
static void tmio_mmc_of_parse(struct platform_device *pdev,
1090
			      struct mmc_host *mmc)
1091
1092
{
	const struct device_node *np = pdev->dev.of_node;
1093

1094
1095
1096
	if (!np)
		return;

1097
1098
1099
1100
1101
	/*
	 * DEPRECATED:
	 * For new platforms, please use "disable-wp" instead of
	 * "toshiba,mmc-wrprotect-disable"
	 */
1102
	if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1103
		mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1104
1105
}

1106
1107
struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
					  struct tmio_mmc_data *pdata)
1108
{
1109
	struct tmio_mmc_host *host;
1110
	struct mmc_host *mmc;
1111
1112
	struct resource *res;
	void __iomem *ctl;
1113
	int ret;
1114
1115
1116
1117
1118

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	ctl = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(ctl))
		return ERR_CAST(ctl);
1119
1120
1121

	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
	if (!mmc)
1122
		return ERR_PTR(-ENOMEM);
1123
1124

	host = mmc_priv(mmc);
1125
	host->ctl = ctl;
1126
1127
	host->mmc = mmc;
	host->pdev = pdev;
1128
	host->pdata = pdata;
1129
1130
	host->ops = tmio_mmc_ops;
	mmc->ops = &host->ops;
1131

1132
1133
1134
1135
1136
1137
	ret = mmc_of_parse(host->mmc);
	if (ret) {
		host = ERR_PTR(ret);
		goto free;
	}

1138
	tmio_mmc_of_parse(pdev, mmc);
1139

1140
1141
	platform_set_drvdata(pdev, host);

1142
1143
1144
1145
	return host;
free:
	mmc_free_host(mmc);

1146
1147
	return host;
}
1148
EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1149
1150
1151
1152
1153

void tmio_mmc_host_free(struct tmio_mmc_host *host)
{
	mmc_free_host(host->mmc);
}
1154
EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1155

1156
int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1157
1158
{
	struct platform_device *pdev = _host->pdev;
1159
	struct tmio_mmc_data *pdata = _host->pdata;
1160
	struct mmc_host *mmc = _host->mmc;
1161
1162
	int ret;

1163
	/*
1164
	 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1165
1166
1167
1168
1169
	 * looping forever...
	 */
	if (mmc->f_min == 0)
		return -EINVAL;

1170
	if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1171
		_host->write16_hook = NULL;
1172

1173
	_host->set_pwr = pdata->set_pwr;
1174

1175
1176
	ret = tmio_mmc_init_ocr(_host);
	if (ret < 0)
1177
		return ret;
1178

1179
1180
1181
1182
1183
1184
1185
	/*
	 * Look for a card detect GPIO, if it fails with anything
	 * else than a probe deferral, just live without it.
	 */
	ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0, NULL);
	if (ret == -EPROBE_DEFER)
		return ret;
1186

1187
	mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1188
	mmc->caps2 |= pdata->capabilities2;