• Masahiro Yamada's avatar
    mmc: uniphier-sd: add UniPhier SD/eMMC controller driver · 3fd784f7
    Masahiro Yamada authored
    Here is another TMIO MMC variant found in Socionext UniPhier SoCs.
    As commit b6147490
     ("mmc: tmio: split core functionality, DMA and
    MFD glue") said, these MMC controllers use the IP from Panasonic.
    However, the MMC controller in the TMIO (Toshiba Mobile IO) MFD chip
    was the first upstreamed user of this IP.  The common driver code
    for this IP is now called 'tmio-mmc-core' in Linux although it is a
    historical misnomer.
    Anyway, this driver select's MMC_TMIO_CORE to borrow the common code
    from tmio-mmc-core.c
    Older UniPhier SoCs (LD4, Pro4, sLD8) support the external DMA engine
    like renesas_sdhi_sys_dmac.c.  The difference is UniPhier SoCs use a
    single DMA channel whereas Renesas chips request separate channels for
    RX and TX.
    Newer UniPhier SoCs (Pro5 and later) support the internal DMA engine
    like renesas_sdhi_internal_dmac.c  The register map is almost the same,
    so I guess Renesas and Socionext use the same internal DMA hardware.
    The main difference is, the register offsets are doubled for Renesas.
                            Renesas      Socionext
                            SDHI         UniPhier
      DM_CM_DTRAN_MODE      0x820        0x410
      DM_CM_DTRAN_CTRL      0x828        0x414
      DM_CM_RST             0x830        0x418
      DM_CM_INFO1           0x840        0x420
      DM_CM_INFO1_MASK      0x848        0x424
      DM_CM_INFO2           0x850        0x428
      DM_CM_INFO2_MASK      0x858        0x42c
      DM_DTRAN_ADDR         0x880        0x440
      DM_DTRAN_ADDREX        ---         0x444
    This comes from the difference of host->bus_shift; 2 for Renesas SoCs,
    and 1 for UniPhier SoCs.  Also, the datasheet for UniPhier SoCs defines
    DM_DTRAN_ADDR and DM_DTRAN_ADDREX as two separate registers.
    It could be possible to factor out the DMA common code by introducing
    some hooks to cope with platform quirks, but this patch does not touch
    that for now.
    Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
    Acked-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
    Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>