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  • linux-arm
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  • arch
  • riscv
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  • image.h
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  • Paul Walmsley's avatar
    riscv: modify the Image header to improve compatibility with the ARM64 header · 474efecb
    Paul Walmsley authored Sep 13, 2019
    
    
    Part of the intention during the definition of the RISC-V kernel image
    header was to lay the groundwork for a future merge with the ARM64
    image header.  One error during my original review was not noticing
    that the RISC-V header's "magic" field was at a different size and
    position than the ARM64's "magic" field.  If the existing ARM64 Image
    header parsing code were to attempt to parse an existing RISC-V kernel
    image header format, it would see a magic number 0.  This is
    undesirable, since it's our intention to align as closely as possible
    with the ARM64 header format.  Another problem was that the original
    "res3" field was not being initialized correctly to zero.
    
    Address these issues by creating a 32-bit "magic2" field in the RISC-V
    header which matches the ARM64 "magic" field.  RISC-V binaries will
    store "RSC\x05" in this field.  The intention is that the use of the
    existing 64-bit "magic" field in the RISC-V header will be deprecated
    over time.  Increment the minor version number of the file format to
    indicate this change, and update the documentation accordingly.  Fix
    the assembler directives in head.S to ensure that reserved fields are
    properly zero-initialized.
    
    Signed-off-by: default avatarPaul Walmsley <paul.walmsley@sifive.com>
    Reported-by: default avatarPalmer Dabbelt <palmer@sifive.com>
    Reviewed-by: default avatarPalmer Dabbelt <palmer@sifive.com>
    Cc: Atish Patra <atish.patra@wdc.com>
    Cc: Karsten Merker <merker@debian.org>
    Link: https://lore.kernel.org/linux-riscv/194c2f10c9806720623430dbf0cc59a965e50448.camel@wdc.com/T/#u
    Link: https://lore.kernel.org/linux-riscv/mhng-755b14c4-8f35-4079-a7ff-e421fd1b02bc@palmer-si-x1e/T/#t
    474efecb