• Nicolin Chen's avatar
    mmc: tegra: Implement ->set_dma_mask() · b960bc44
    Nicolin Chen authored
    The SDHCI controller on Tegra186 supports 40-bit addressing, which is
    usually enough to address all of system memory. However, if the SDHCI
    controller is behind an IOMMU, the address space can go beyond. This
    happens on Tegra186 and later where the ARM SMMU has an input address
    space of 48 bits. If the DMA API is backed by this ARM SMMU, the top-
    down IOVA allocator will cause IOV addresses to be returned that the
    SDHCI controller cannot access.
    Unfortunately, prior to the introduction of the ->set_dma_mask() host
    operation, the SDHCI core would set either a 64-bit DMA mask if the
    controller claimed to support 64-bit addressing, or a 32-bit DMA mask
    Since the full 64 bits cannot be addressed on Tegra, this had to be
    worked around in commit 68481a7e
     ("mmc: tegra: Mark 64 bit dma
    broken on Tegra186") by setting the SDHCI_QUIRK2_BROKEN_64_BIT_DMA
    quirk, which effectively restricts the DMA mask to 32 bits.
    One disadvantage of this is that dma_map_*() APIs will now try to use
    the swiotlb to bounce DMA to addresses beyond of the controller's DMA
    mask. This in turn caused degraded performance and can lead to
    situations where the swiotlb buffer is exhausted, which in turn leads
    to DMA transfers to fail.
    With the recent introduction of the ->set_dma_mask() host operation,
    this can now be properly fixed. For each generation of Tegra, the exact
    supported DMA mask can be configured. This kills two birds with one
    stone: it avoids the use of bounce buffers because system memory never
    exceeds the addressable memory range of the SDHCI controllers on these
    devices, and at the same time when an IOMMU is involved, it prevents
    IOV addresses from being allocated beyond the addressible range of the
    Since the DMA mask is now properly handled, the 64-bit DMA quirk can be
    Signed-off-by: default avatarNicolin Chen <nicoleotsuka@gmail.com>
    [treding@nvidia.com: provide more background in commit message]
    Tested-by: default avatarNicolin Chen <nicoleotsuka@gmail.com>
    Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
    Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
    Cc: stable@vger.kernel.org # v4.15 +
    Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>