• Al Cooper's avatar
    mmc: sdhci: Fix incorrect switch to HS mode · c894e33d
    Al Cooper authored
    When switching from any MMC speed mode that requires 1.8v
    (HS200, HS400 and HS400ES) to High Speed (HS) mode, the system
    ends up configured for SDR12 with a 50MHz clock which is an illegal
    This happens because the SDHCI_CTRL_VDD_180 bit in the
    SDHCI_HOST_CONTROL2 register is left set and when this bit is
    set, the speed mode is controlled by the SDHCI_CTRL_UHS field
    in the SDHCI_HOST_CONTROL2 register. The SDHCI_CTRL_UHS field
    will end up being set to 0 (SDR12) by sdhci_set_uhs_signaling()
    because there is no UHS mode being set.
    The fix is to change sdhci_set_uhs_signaling() to set the
    SDHCI_CTRL_UHS field to SDR25 (which is the same as HS) for
    any switch to HS mode.
    This was found on a new eMMC controller that does strict checking
    of the speed mode and the corresponding clock rate. It caused the
    switch to HS400 mode to fail because part of the sequence to switch
    to HS400 requires a switch from HS200 to HS before going to HS400.
    Suggested-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
    Signed-off-by: default avatarAl Cooper <alcooperx@gmail.com>
    Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>