Commit 04ce9318 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'char-misc-5.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver fixes from Greg KH:
 "Here are some small char and misc driver fixes for 5.3-rc2 to resolve
  some reported issues.

  Nothing major at all, some binder bugfixes for issues found, some new
  mei device ids, firmware building warning fixes, habanalabs fixes, a
  few other build fixes, and a MAINTAINERS update.

  All of these have been in linux-next with no reported issues"

* tag 'char-misc-5.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc:
  test_firmware: fix a memory leak bug
  hpet: Fix division by zero in hpet_time_div()
  eeprom: make older eeprom drivers select NVMEM_SYSFS
  vmw_balloon: Remove Julien from the maintainers list
  fpga-manager: altera-ps-spi: Fix build error
  mei: me: add mule creek canyon (EHL) device ids
  binder: prevent transactions to context manager from its own process.
  binder: Set end of SG buffer area properly.
  firmware: Fix missing inline
  firmware: fix build errors in paged buffer handling code
  habanalabs: don't reset device when getting VRHOT
  habanalabs: use %pad for printing a dma_addr_t
parents 572782b2 d4fddac5
...@@ -17172,7 +17172,6 @@ F: drivers/vme/ ...@@ -17172,7 +17172,6 @@ F: drivers/vme/
F: include/linux/vme* F: include/linux/vme*
VMWARE BALLOON DRIVER VMWARE BALLOON DRIVER
M: Julien Freche <jfreche@vmware.com>
M: Nadav Amit <namit@vmware.com> M: Nadav Amit <namit@vmware.com>
M: "VMware, Inc." <pv-drivers@vmware.com> M: "VMware, Inc." <pv-drivers@vmware.com>
L: linux-kernel@vger.kernel.org L: linux-kernel@vger.kernel.org
......
...@@ -2988,7 +2988,7 @@ static void binder_transaction(struct binder_proc *proc, ...@@ -2988,7 +2988,7 @@ static void binder_transaction(struct binder_proc *proc,
else else
return_error = BR_DEAD_REPLY; return_error = BR_DEAD_REPLY;
mutex_unlock(&context->context_mgr_node_lock); mutex_unlock(&context->context_mgr_node_lock);
if (target_node && target_proc == proc) { if (target_node && target_proc->pid == proc->pid) {
binder_user_error("%d:%d got transaction to context manager from process owning it\n", binder_user_error("%d:%d got transaction to context manager from process owning it\n",
proc->pid, thread->pid); proc->pid, thread->pid);
return_error = BR_FAILED_REPLY; return_error = BR_FAILED_REPLY;
...@@ -3239,7 +3239,8 @@ static void binder_transaction(struct binder_proc *proc, ...@@ -3239,7 +3239,8 @@ static void binder_transaction(struct binder_proc *proc,
buffer_offset = off_start_offset; buffer_offset = off_start_offset;
off_end_offset = off_start_offset + tr->offsets_size; off_end_offset = off_start_offset + tr->offsets_size;
sg_buf_offset = ALIGN(off_end_offset, sizeof(void *)); sg_buf_offset = ALIGN(off_end_offset, sizeof(void *));
sg_buf_end_offset = sg_buf_offset + extra_buffers_size; sg_buf_end_offset = sg_buf_offset + extra_buffers_size -
ALIGN(secctx_sz, sizeof(u64));
off_min = 0; off_min = 0;
for (buffer_offset = off_start_offset; buffer_offset < off_end_offset; for (buffer_offset = off_start_offset; buffer_offset < off_end_offset;
buffer_offset += sizeof(binder_size_t)) { buffer_offset += sizeof(binder_size_t)) {
......
...@@ -141,8 +141,8 @@ int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed); ...@@ -141,8 +141,8 @@ int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed);
int fw_map_paged_buf(struct fw_priv *fw_priv); int fw_map_paged_buf(struct fw_priv *fw_priv);
#else #else
static inline void fw_free_paged_buf(struct fw_priv *fw_priv) {} static inline void fw_free_paged_buf(struct fw_priv *fw_priv) {}
int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed) { return -ENXIO; } static inline int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed) { return -ENXIO; }
int fw_map_paged_buf(struct fw_priv *fw_priv) { return -ENXIO; } static inline int fw_map_paged_buf(struct fw_priv *fw_priv) { return -ENXIO; }
#endif #endif
#endif /* __FIRMWARE_LOADER_H */ #endif /* __FIRMWARE_LOADER_H */
...@@ -567,8 +567,7 @@ static inline unsigned long hpet_time_div(struct hpets *hpets, ...@@ -567,8 +567,7 @@ static inline unsigned long hpet_time_div(struct hpets *hpets,
unsigned long long m; unsigned long long m;
m = hpets->hp_tick_freq + (dis >> 1); m = hpets->hp_tick_freq + (dis >> 1);
do_div(m, dis); return div64_ul(m, dis);
return (unsigned long)m;
} }
static int static int
......
...@@ -40,6 +40,7 @@ config ALTERA_PR_IP_CORE_PLAT ...@@ -40,6 +40,7 @@ config ALTERA_PR_IP_CORE_PLAT
config FPGA_MGR_ALTERA_PS_SPI config FPGA_MGR_ALTERA_PS_SPI
tristate "Altera FPGA Passive Serial over SPI" tristate "Altera FPGA Passive Serial over SPI"
depends on SPI depends on SPI
select BITREVERSE
help help
FPGA manager driver support for Altera Arria/Cyclone/Stratix FPGA manager driver support for Altera Arria/Cyclone/Stratix
using the passive serial interface over SPI. using the passive serial interface over SPI.
......
...@@ -5,6 +5,7 @@ config EEPROM_AT24 ...@@ -5,6 +5,7 @@ config EEPROM_AT24
tristate "I2C EEPROMs / RAMs / ROMs from most vendors" tristate "I2C EEPROMs / RAMs / ROMs from most vendors"
depends on I2C && SYSFS depends on I2C && SYSFS
select NVMEM select NVMEM
select NVMEM_SYSFS
select REGMAP_I2C select REGMAP_I2C
help help
Enable this driver to get read/write support to most I2C EEPROMs Enable this driver to get read/write support to most I2C EEPROMs
...@@ -34,6 +35,7 @@ config EEPROM_AT25 ...@@ -34,6 +35,7 @@ config EEPROM_AT25
tristate "SPI EEPROMs from most vendors" tristate "SPI EEPROMs from most vendors"
depends on SPI && SYSFS depends on SPI && SYSFS
select NVMEM select NVMEM
select NVMEM_SYSFS
help help
Enable this driver to get read/write support to most SPI EEPROMs, Enable this driver to get read/write support to most SPI EEPROMs,
after you configure the board init code to know about each eeprom after you configure the board init code to know about each eeprom
...@@ -80,6 +82,7 @@ config EEPROM_93XX46 ...@@ -80,6 +82,7 @@ config EEPROM_93XX46
depends on SPI && SYSFS depends on SPI && SYSFS
select REGMAP select REGMAP
select NVMEM select NVMEM
select NVMEM_SYSFS
help help
Driver for the microwire EEPROM chipsets 93xx46x. The driver Driver for the microwire EEPROM chipsets 93xx46x. The driver
supports both read and write commands and also the command to supports both read and write commands and also the command to
......
...@@ -695,8 +695,8 @@ static int goya_sw_init(struct hl_device *hdev) ...@@ -695,8 +695,8 @@ static int goya_sw_init(struct hl_device *hdev)
goto free_dma_pool; goto free_dma_pool;
} }
dev_dbg(hdev->dev, "cpu accessible memory at bus address 0x%llx\n", dev_dbg(hdev->dev, "cpu accessible memory at bus address %pad\n",
hdev->cpu_accessible_dma_address); &hdev->cpu_accessible_dma_address);
hdev->cpu_accessible_dma_pool = gen_pool_create(ilog2(32), -1); hdev->cpu_accessible_dma_pool = gen_pool_create(ilog2(32), -1);
if (!hdev->cpu_accessible_dma_pool) { if (!hdev->cpu_accessible_dma_pool) {
...@@ -4449,7 +4449,6 @@ void goya_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_entry) ...@@ -4449,7 +4449,6 @@ void goya_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_entry)
case GOYA_ASYNC_EVENT_ID_AXI_ECC: case GOYA_ASYNC_EVENT_ID_AXI_ECC:
case GOYA_ASYNC_EVENT_ID_L2_RAM_ECC: case GOYA_ASYNC_EVENT_ID_L2_RAM_ECC:
case GOYA_ASYNC_EVENT_ID_PSOC_GPIO_05_SW_RESET: case GOYA_ASYNC_EVENT_ID_PSOC_GPIO_05_SW_RESET:
case GOYA_ASYNC_EVENT_ID_PSOC_GPIO_10_VRHOT_ICRIT:
goya_print_irq_info(hdev, event_type, false); goya_print_irq_info(hdev, event_type, false);
hl_device_reset(hdev, true, false); hl_device_reset(hdev, true, false);
break; break;
...@@ -4485,6 +4484,7 @@ void goya_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_entry) ...@@ -4485,6 +4484,7 @@ void goya_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_entry)
goya_unmask_irq(hdev, event_type); goya_unmask_irq(hdev, event_type);
break; break;
case GOYA_ASYNC_EVENT_ID_PSOC_GPIO_10_VRHOT_ICRIT:
case GOYA_ASYNC_EVENT_ID_TPC0_BMON_SPMU: case GOYA_ASYNC_EVENT_ID_TPC0_BMON_SPMU:
case GOYA_ASYNC_EVENT_ID_TPC1_BMON_SPMU: case GOYA_ASYNC_EVENT_ID_TPC1_BMON_SPMU:
case GOYA_ASYNC_EVENT_ID_TPC2_BMON_SPMU: case GOYA_ASYNC_EVENT_ID_TPC2_BMON_SPMU:
......
...@@ -81,6 +81,9 @@ ...@@ -81,6 +81,9 @@
#define MEI_DEV_ID_ICP_LP 0x34E0 /* Ice Lake Point LP */ #define MEI_DEV_ID_ICP_LP 0x34E0 /* Ice Lake Point LP */
#define MEI_DEV_ID_MCC 0x4B70 /* Mule Creek Canyon (EHL) */
#define MEI_DEV_ID_MCC_4 0x4B75 /* Mule Creek Canyon 4 (EHL) */
/* /*
* MEI HW Section * MEI HW Section
*/ */
......
...@@ -98,6 +98,9 @@ static const struct pci_device_id mei_me_pci_tbl[] = { ...@@ -98,6 +98,9 @@ static const struct pci_device_id mei_me_pci_tbl[] = {
{MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)}, {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)},
{MEI_PCI_DEVICE(MEI_DEV_ID_MCC, MEI_ME_PCH12_CFG)},
{MEI_PCI_DEVICE(MEI_DEV_ID_MCC_4, MEI_ME_PCH8_CFG)},
/* required last entry */ /* required last entry */
{0, } {0, }
}; };
......
...@@ -886,8 +886,11 @@ static int __init test_firmware_init(void) ...@@ -886,8 +886,11 @@ static int __init test_firmware_init(void)
return -ENOMEM; return -ENOMEM;
rc = __test_firmware_config_init(); rc = __test_firmware_config_init();
if (rc) if (rc) {
kfree(test_fw_config);
pr_err("could not init firmware test config: %d\n", rc);
return rc; return rc;
}
rc = misc_register(&test_fw_misc_device); rc = misc_register(&test_fw_misc_device);
if (rc) { if (rc) {
......
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