Commit 4a9e0d1a authored by Ben Chuang's avatar Ben Chuang Committed by Ulf Hansson
Browse files

mmc: sdhci: Change timeout of loop for checking internal clock stable



According to section 3.2.1 internal clock setup in SD Host Controller
Simplified Specifications 4.20, the timeout of loop for checking
internal clock stable is defined as 150ms.

Signed-off-by: default avatarBen Chuang <ben.chuang@genesyslogic.com.tw>
Co-developed-by: default avatarMichael K Johnson <johnsonm@danlj.org>
Signed-off-by: default avatarMichael K Johnson <johnsonm@danlj.org>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 5c1a4f40
......@@ -1636,8 +1636,8 @@ void sdhci_enable_clk(struct sdhci_host *host, u16 clk)
clk |= SDHCI_CLOCK_INT_EN;
sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
/* Wait max 20 ms */
timeout = ktime_add_ms(ktime_get(), 20);
/* Wait max 150 ms */
timeout = ktime_add_ms(ktime_get(), 150);
while (1) {
bool timedout = ktime_after(ktime_get(), timeout);
......
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