Commit a3aa6e65 authored by Marek Vasut's avatar Marek Vasut Committed by David S. Miller
Browse files

net: dsa: microchip: Always set regmap stride to 1



The regmap stride is set to 1 for regmap describing 8bit registers already.
However, for 16/32/64bit registers, the stride is 2/4/8 respectively. This
is not correct, as the switch protocol supports unaligned register reads
and writes and the KSZ87xx even uses such unaligned register accesses to
read e.g. MIB counter.

This patch fixes MIB counter access on KSZ87xx.
Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: David S. Miller <davem@davemloft.net>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Tristram Ha <Tristram.Ha@microchip.com>
Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Cc: Woojung Huh <woojung.huh@microchip.com>
Fixes: 46558d60 ("net: dsa: microchip: Initial SPI regmap support")
Fixes: 255b59ad

 ("net: dsa: microchip: Factor out regmap config generation into common header")
Reviewed-by: default avatarGeorge McCollister <george.mccollister@gmail.com>
Tested-by: default avatarGeorge McCollister <george.mccollister@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c5f095ba
......@@ -303,7 +303,7 @@ static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
{ \
.name = #width, \
.val_bits = (width), \
.reg_stride = (width) / 8, \
.reg_stride = 1, \
.reg_bits = (regbits) + (regalign), \
.pad_bits = (regpad), \
.max_register = BIT(regbits) - 1, \
......
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