1. 27 Sep, 2019 2 commits
  2. 22 Sep, 2019 3 commits
  3. 16 Sep, 2019 4 commits
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Configure the Time-Aware Scheduler via tc-taprio offload · 317ab5b8
      Vladimir Oltean authored
      This qdisc offload is the closest thing to what the SJA1105 supports in
      hardware for time-based egress shaping. The switch core really is built
      around SAE AS6802/TTEthernet (a TTTech standard) but can be made to
      operate similarly to IEEE 802.1Qbv with some constraints:
      - The gate control list is a global list for all ports. There are 8
        execution threads that iterate through this global list in parallel.
        I don't know why 8, there are only 4 front-panel ports.
      - Care must be taken by the user to make sure that two execution threads
        never get to execute a GCL entry simultaneously. I created a O(n^4)
        checker for this hardware limitation, prior to accepting a taprio
        offload configuration as valid.
      - The spec says that if a GCL entry's interval is shorter than the frame
        length, you shouldn't send it (and end up in head-of-line blocking).
        Well, this switch does anyway.
      - The switch has no concept of ADMIN and OPER configurations. Because
        it's so simple, the TAS settings are loaded through the static config
        tables interface, so there isn't even place for any discussion about
        'graceful switchover between ADMIN and OPER'. You just reset the
        switch and upload a new OPER config.
      - The switch accepts multiple time sources for the gate events. Right
        now I am using the standalone clock source as opposed to PTP. So the
        base time parameter doesn't really do much. Support for the PTP clock
        source will be added in a future series.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Advertise the 8 TX queues · 5f06c63b
      Vladimir Oltean authored
      This is a preparation patch for the tc-taprio offload (and potentially
      for other future offloads such as tc-mqprio).
      Instead of looking directly at skb->priority during xmit, let's get the
      netdev queue and the queue-to-traffic-class mapping, and put the
      resulting traffic class into the dsa_8021q PCP field. The switch is
      configured with a 1-to-1 PCP-to-ingress-queue-to-egress-queue mapping
      (see vlan_pmap in sja1105_main.c), so the effect is that we can inject
      into a front-panel's egress traffic class through VLAN tagging from
      Linux, completely transparently.
      Unfortunately the switch doesn't look at the VLAN PCP in the case of
      management traffic to/from the CPU (link-local frames at
      01-80-C2-xx-xx-xx or 01-1B-19-xx-xx-xx) so we can't alter the
      transmission queue of this type of traffic on a frame-by-frame basis. It
      is only selected through the "hostprio" setting which ATM is harcoded in
      the driver to 7.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Add static config tables for scheduling · 7f1e4ba8
      Vladimir Oltean authored
      In order to support tc-taprio offload, the TTEthernet egress scheduling
      core registers must be made visible through the static interface.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    • Florian Fainelli's avatar
      net: dsa: b53: Add support for port_egress_floods callback · 53568438
      Florian Fainelli authored
      Add support for configuring the per-port egress flooding control for
      both Unicast and Multicast traffic.
      Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
  4. 12 Sep, 2019 2 commits
  5. 10 Sep, 2019 3 commits
  6. 04 Sep, 2019 2 commits
  7. 01 Sep, 2019 11 commits
  8. 31 Aug, 2019 1 commit
  9. 30 Aug, 2019 3 commits
  10. 28 Aug, 2019 7 commits
  11. 22 Aug, 2019 1 commit
  12. 20 Aug, 2019 1 commit