1. 27 Sep, 2019 1 commit
    • Russell King's avatar
      mmc: sdhci-of-esdhc: set DMA snooping based on DMA coherence · 121bd08b
      Russell King authored
      
      
      We must not unconditionally set the DMA snoop bit; if the DMA API is
      assuming that the device is not DMA coherent, and the device snoops the
      CPU caches, the device can see stale cache lines brought in by
      speculative prefetch.
      
      This leads to the device seeing stale data, potentially resulting in
      corrupted data transfers.  Commonly, this results in a descriptor fetch
      error such as:
      
      mmc0: ADMA error
      mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
      mmc0: sdhci: Sys addr:  0x00000000 | Version:  0x00002202
      mmc0: sdhci: Blk size:  0x00000008 | Blk cnt:  0x00000001
      mmc0: sdhci: Argument:  0x00000000 | Trn mode: 0x00000013
      mmc0: sdhci: Present:   0x01f50008 | Host ctl: 0x00000038
      mmc0: sdhci: Power:     0x00000003 | Blk gap:  0x00000000
      mmc0: sdhci: Wake-up:   0x00000000 | Clock:    0x000040d8
      mmc0: sdhci: Timeout:   0x00000003 | Int stat: 0x00000001
      mmc0: sdhci: Int enab:  0x037f108f | Sig enab: 0x037f108b
      mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
      mmc0: sdhci: Caps:      0x35fa0000 | Caps_1:   0x0000af00
      mmc0: sdhci: Cmd:       0x0000333a | Max curr: 0x00000000
      mmc0: sdhci: Resp[0]:   0x00000920 | Resp[1]:  0x001d8a33
      mmc0: sdhci: Resp[2]:   0x325b5900 | Resp[3]:  0x3f400e00
      mmc0: sdhci: Host ctl2: 0x00000000
      mmc0: sdhci: ADMA Err:  0x00000009 | ADMA Ptr: 0x000000236d43820c
      mmc0: sdhci: ============================================
      mmc0: error -5 whilst initialising SD card
      
      but can lead to other errors, and potentially direct the SDHCI
      controller to read/write data to other memory locations (e.g. if a valid
      descriptor is visible to the device in a stale cache line.)
      
      Fix this by ensuring that the DMA snoop bit corresponds with the
      behaviour of the DMA API.  Since the driver currently only supports DT,
      use of_dma_is_coherent().  Note that device_get_dma_attr() can not be
      used as that risks re-introducing this bug if/when the driver is
      converted to ACPI.
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      121bd08b
  2. 11 Sep, 2019 1 commit
  3. 17 Jun, 2019 2 commits
  4. 30 May, 2019 1 commit
  5. 15 Apr, 2019 6 commits
  6. 17 Dec, 2018 6 commits
  7. 08 Oct, 2018 1 commit
    • Yinbo Zhu's avatar
      mmc: sdhci-of-esdhc: add erratum A008171 support · b1f378ab
      Yinbo Zhu authored
      
      
      In tuning mode of operation, when TBCTL[TB_EN] is set, eSDHC may report
      one of the following errors :
      1)Tuning error while running tuning operation where SYSCTL2[SAMPCLKSEL]
      will not get set even when SYSCTL2[EXTN] is reset. OR
      2)Data transaction error (e.g. IRQSTAT[DCE], IRQSTAT[DEBE]) during data
      transaction errors.
      This issue occurs when the data window sampled within eSDHC is in full
      cycle. So, in that case, eSDHC is not able to find out the start and
      end points of the data window and sets the sampling pointer at default
      location (which is middle of the internal SD clock). If this sampling
      point coincides with the data eye boundary, then it can result in the
      above mentioned errors. Impact: Tuning mode of operation for SDR50,
      SDR104 or HS200 speed modes may not work properly
      Workaround: In case eSDHC reports tuning error or data errors in tuning
      mode of operation, by add the erratum A008171 support to fix the issue.
      Signed-off-by: default avatarYinbo Zhu <yinbo.zhu@nxp.com>
      Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      b1f378ab
  8. 16 Jul, 2018 2 commits
  9. 11 Dec, 2017 2 commits
  10. 30 Oct, 2017 1 commit
  11. 30 Aug, 2017 1 commit
  12. 28 Apr, 2017 2 commits
  13. 24 Apr, 2017 5 commits
  14. 13 Feb, 2017 2 commits
    • yangbo lu's avatar
      mmc: sdhci-of-esdhc: avoid clock glitch when frequency is changing · e87d2db2
      yangbo lu authored
      
      
      The eSDHC_PRSSTAT[SDSTB] bit indicates whether the internal card clock is
      stable. This bit is for the host driver to poll clock status when changing
      the clock frequency. It is recommended to clear eSDHC_SYSCTL[SDCLKEN]
      to remove glitch on the card clock when the frequency is changing. This
      patch is to disable SDCLKEN bit before changing frequency and enable it
      after SDSTB bit is set.
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
      Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      e87d2db2
    • yangbo lu's avatar
      mmc: sdhci-of-esdhc: remove default broken-cd for ARM · e9acc77d
      yangbo lu authored
      
      
      Initially all QorIQ platforms were PowerPC architecture and they didn't
      support card detection except several platforms. The driver added the
      quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION as default and this made broken-cd
      property in dts node didn't work. Now QorIQ platform turns to ARM
      architecture and most of them could support card detection. However it's
      a large number of dts trees that need to be fixed with broken-cd if we
      remove the default SDHCI_QUIRK_BROKEN_CARD_DETECTION in driver. And the
      users don't want to see this. So this patch is to remove this default
      quirk just for ARM and keep it for PowerPC.(Note, QorIQ PowerPC platform
      only has big-endian eSDHC while QorIQ ARM platform has big-endian or
      little-endian eSDHC) This makes broken-cd property work again for ARM.
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
      Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      e9acc77d
  15. 29 Nov, 2016 1 commit
  16. 18 Nov, 2016 1 commit
  17. 26 Sep, 2016 1 commit
  18. 27 Jul, 2016 1 commit
  19. 29 Feb, 2016 1 commit
  20. 22 Dec, 2015 1 commit
    • yangbo lu's avatar
      mmc: sdhci-of-esdhc: add/remove some quirks according to vendor version · 1ef5e49e
      yangbo lu authored
      
      
      A previous patch had removed esdhc_of_platform_init() by mistake.
      static void esdhc_of_platform_init(struct sdhci_host *host)
      {
      	u32 vvn;
      
      	vvn = in_be32(host->ioaddr + SDHCI_SLOT_INT_STATUS);
      	vvn = (vvn & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT;
      	if (vvn == VENDOR_V_22)
      		host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
      
      	if (vvn > VENDOR_V_22)
      		host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
      }
      
      This patch is used to fix it by add/remove some quirks according to
      verdor version in probe.
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@freescale.com>
      Fixes: f4932cfd
      
       ("mmc: sdhci-of-esdhc: support both BE and LE host controller")
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      1ef5e49e
  21. 26 Oct, 2015 1 commit