- 28 Aug, 2019 2 commits
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David Jander authored
The register number needs to be translated for chips with more than 8 ports. This patch fixes a bug causing all chips with more than 8 GPIO pins to not work correctly. Fixes: 0f25fda8 ("gpio: pca953x: Zap ad-hoc reg_direction cache") Cc: Cc: <stable@vger.kernel.org> Signed-off-by:
David Jander <david@protonic.nl> Signed-off-by:
Bartosz Golaszewski <bgolaszewski@baylibre.com>
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David Jander authored
The type of reg_direction needs to match the type of the regmap, which is u8. Fixes: 0f25fda8 ("gpio: pca953x: Zap ad-hoc reg_direction cache") Cc: Cc: <stable@vger.kernel.org> Signed-off-by:
David Jander <david@protonic.nl> Signed-off-by:
Bartosz Golaszewski <bgolaszewski@baylibre.com>
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- 07 Jun, 2019 1 commit
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H. Nikolaus Schaller authored
24 bit expanders use REG_ADDR_AI in combination with register addressing. This conflicts with regmap which takes this bit as part of the register number, i.e. a second cache entry is defined for accessed with REG_ADDR_AI being set although on the chip it is the same register as with REG_ADDR_AI being cleared. The problem was introduced by commit b32cecb4 ("gpio: pca953x: Extract the register address mangling to single function") but only became visible by commit 8b9f9d4d ("regmap: verify if register is writeable before writing operations") because before, the regmap size was effectively ignored and pca953x_writeable_register() did know to ignore REG_ADDR_AI. Still, there were two separate cache entries created. Since the use of REG_ADDR_AI seems to be static we can work around this issue by simply increasing the size of the regmap to cover the "virtual" registers with REG_ADDR_AI being set. This only means that half of the regmap buffer will be unused. Reported-by:
H. Nikolaus Schaller <hns@goldelico.com> Suggested-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 05 Jun, 2019 1 commit
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Thomas Gleixner authored
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 of the license extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 315 file(s). Signed-off-by:
Thomas Gleixner <tglx@linutronix.de> Reviewed-by:
Allison Randal <allison@lohutok.net> Reviewed-by:
Armijn Hemel <armijn@tjaldur.nl> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190115.503150771@linutronix.de Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 02 Jun, 2019 1 commit
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Peter Robinson authored
The TI TCA9539 is a variant of the PCA953x GPIO expander, with 16 GPIOs and interrupt functionality. Signed-off-by:
Peter Robinson <pbrobinson@gmail.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 11 Apr, 2019 2 commits
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Alexandre Belloni authored
The NXP PCA6416, documented at [1], is a variant of the PCA GPIO expander with 16 GPIOs, and supporting an interrupt. [1] https://www.nxp.com/docs/en/data-sheet/PCA6416A.pdf Signed-off-by:
Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Alexandre Belloni authored
When adding support for the pcal6416, the of_device_id table was left out, add the proper entry. Fixes: aac1e3c9 ("gpio: pca953x: add support for pcal6416 type") Signed-off-by:
Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 08 Apr, 2019 1 commit
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Geert Uytterhoeven authored
If a device is part of the wake-up path, it should indicate this by setting its power.wakeup_path field. This allows the genpd core code to keep the device enabled during system suspend when needed. As regulators powering devices are not handled by genpd, the driver handles these itself, and thus must skip regulator control when the device is part of the wake-up path. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 22 Mar, 2019 1 commit
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Geert Uytterhoeven authored
The ON Semiconductor CAT9554 is a variant of the PCA953x GPIO expander, with 8 GPIOs and interrupt functionality. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
Bartosz Golaszewski <bgolaszewski@baylibre.com>
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- 08 Mar, 2019 1 commit
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Andy Shevchenko authored
The commit 0cdf21b3 ("gpio: pca953x: set the PCA_PCAL flag also when matching by DT") introduces a helper macro which tells that chip supports latched interrupts, but the macro was never used for ACPI or legacy enumeration. So, make use of it for legacy and ACPI enumeration. Cc: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 01 Mar, 2019 1 commit
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Mark Walton authored
If a PCA953x gpio was used as an interrupt and then released, the shutdown function was trying to extract the pca953x_chip pointer directly from the irq_data, but in reality was getting the gpio_chip structure. The net effect was that the subsequent writes to the data structure corrupted data in the gpio_chip structure, which wasn't immediately obvious until attempting to use the GPIO again in the future, at which point the kernel panics. This fix correctly extracts the pca953x_chip structure via the gpio_chip structure, as is correctly done in the other irq functions. Fixes: 0a70fe00 ("gpio: pca953x: Clear irq trigger type on irq shutdown") Cc: stable@vger.kernel.org Signed-off-by:
Mark Walton <mark.walton@serialtek.com> Reviewed-by:
Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 20 Feb, 2019 1 commit
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Geert Uytterhoeven authored
Implement the irq_set_wake() method in the (optional) irq_chip of the GPIO expander, and propagate wake-up settings to the upstream interrupt controller. This allows GPIOs connected to a PCA953X GPIO expander to serve as wake-up sources. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 14 Feb, 2019 1 commit
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Thomas Petazzoni authored
The NXP PCAL6416, documented at [1], is a variant of the PCA GPIO expander with 16 GPIOs, and supporting an interrupt and the "extended" features for interrupt, pull-up/pull-down configuration, etc. [1] https://www.nxp.com/docs/en/data-sheet/PCAL6416A.pdf Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by:
Bartosz Golaszewski <bgolaszewski@baylibre.com>
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- 13 Feb, 2019 1 commit
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Thomas Petazzoni authored
This commit adds a minimal implementation of the ->set_config() hook, with support for the PIN_CONFIG_BIAS_PULL_UP and PIN_CONFIG_BIAS_PULL_DOWN configurations. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 21 Jan, 2019 2 commits
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Thomas Petazzoni authored
When a system has two PCA953x GPIO expanders, the kernel complains with: gpio gpiochip2: (0-0021): detected irqchip that is shared with multiple gpiochips: please fix the driver. Indeed, there is a single instance of "struct irq_chip" that gets re-used for both PCA953x instance. This commit moves the "struct irq_chip" to be part of the "struct pca953x_chip", so that we have one "struct irq_chip" per PCA953X instance. As part of this, the name of the irq_chip is also made different on a per-instance basis, now using the dev_name() of the I2C device. This changes what is visible in /proc/interrupts. Before: 47: 0 0 pca953x 10 Edge e0100000.sdhci cd 48: 0 0 pca953x 6 Edge e0101000.sdhci cd After: 47: 0 0 0-0020 10 Edge e0100000.sdhci cd 48: 2 0 0-0020 6 Edge e0101000.sdhci cd Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Thomas Petazzoni authored
The current design of pca953x_irq_setup() is: if (all conditions to support IRQ are met) { lots of code to support IRQs, which goes to a serious indentation level. } return 0; It makes more sense to handle this like this: if (!all conditions to support IRQ are met) return 0; handle IRQ support This commit does just this change, reducing by one tab the indentation level of the IRQ setup code. Thanks to this reduced indentation level, we are less restricted by the 80-column limit, and we can have more function arguments on the same line. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 11 Jan, 2019 1 commit
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Wei Yongjun authored
Fixes the following sparse warning: drivers/gpio/gpio-pca953x.c:292:28: warning: symbol 'pca953x_i2c_regmap' was not declared. Should it be static? Fixes: 49427232 ("gpio: pca953x: Perform basic regmap conversion") Signed-off-by:
Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 17 Dec, 2018 1 commit
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Linus Walleij authored
Instead of using the name directly from the I2C client to name the gpio_chip, use dev_name() on the client->dev, so we get the sometimes more unique device name, as I2C has a mechanism for naming its devices explicitly in e.g. board data. This is a prerequisite for being able to reference uniquely any I2C GPIO expander defined in a board file when setting up GPIO descriptor tables. Reviewed-by:
Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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- 14 Dec, 2018 14 commits
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Marek Vasut authored
It is possible that the PCA953x is powered down during suspend. Use regmap cache to assure the registers in the PCA953x are in line with the driver state after resume. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
Drop pca953x_write_single() which is used in one place. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
Replace the ad-hoc reg_output output register caching with generic regcache cache. Drop pca953x_write_single() which is no longer used. This reduces code duplication. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
Replace the ad-hoc reg_direction direction register caching with generic regcache cache. This reduces code duplication. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
Convert the driver to use regmap to access the chips. Due to the convoluted register mapping scheme, implement read/write/volatile check functions that untangle the mess and perform check accordingly. This patch does not zap the internal register cache of the PCA953x driver, nor does it push the regmap access down into the gpiochip accessors to simplify the review. All that is in subsequent patches. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
Instead of having the I2C register calculation function spread across multiple accessor functions, pull it out into a single function which returns the adjusted register address. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
The ad-hoc i2c block write can be replaced by standard register accessor function, which correctly handles all the chip details and differences. Do so to simplify the code. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
The PCA957x and PCA953x init functions are almost the same, except for the different register mapping and one extra write to BKEN register in case of PCA957x. Factor out the common code. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
At this point, the pca953x_{read,write}_regs_mul() can read single bank PCA953x GPIO chips as well. Merge the _8 and _mul functions together to simplify the code a bit. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
At this point, these two functions only differ in whether they do or do not set the address increment bit. The 16 GPIO case does not need to set the AI bit, except for PCA9575 on write, while the 24 GPIO and more case does set the AI bit always. Merge these two functions together to simplify the code a bit. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
At this point, these two functions only differ in whether they do or do not set the address increment bit on PCA9575. Merge these two functions together to simplify the code a bit. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
The multi-byte IO on various pca953x chips requires the auto-increment bit, while other chips toggle the LSbit automatically. Note that LSbit toggling only alternates between two registers during the IO, it is not the same as address auto-increment. The driver currently assumes that #gpios > 16 implies auto-increment, while #gpios <= 16 implies LSbit toggling. This is incorrect at there are chips with 16 GPIOs which require the auto-increment bit. The PCA9575, according to NXP datasheet rev. 4.2 from 16 April 2015, section 7.3 Command Register, the bit 7 in command register is the auto-increment bit, which allows programming multiple registers sequentially. Set this bit both in pca953x_gpio_set_multiple(), where it fixes the multi register programming, and in pca957x_write_regs_16(), where is simplifies the function. In fact, the pca957x_write_regs_16() now looks rather similar to pca953x_write_regs_24() and pca953x_write_regs_16(), which is intended for subsequent patches. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
The PCAL_PINCTRL_MASK is too large. The extended register block on PCAL6524, which is the largest chip with this block, has the block limited to address range 0x40..0x7f. This is because the bit 7 in the command register is used for the Address Increment functionality. Trim the mask to 0x60 to match the datasheet and to prevent accidental overwrite of the AI bit. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by:
Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Marek Vasut authored
The bank_shift = fls(...) code was duplicated in the driver 5 times, pull it into separate function. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by:
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 02 Jul, 2018 1 commit
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Baruch Siach authored
Don't warn about missing interrupts support when the parent interrupt is not defined. Enabling interrupts support would not make it work anyway. Signed-off-by:
Baruch Siach <baruch@tkos.co.il> Reviewed-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 24 May, 2018 1 commit
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 23 May, 2018 4 commits
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H. Nikolaus Schaller authored
The register constants are so far defined in a way that they fit for the pcal9555a when shifted by the number of banks, i.e. are multiplied by 2 in the accessor function. Now, the pcal6524 has 3 banks which means the relative offset is multiplied by 4 for the standard registers. Simply applying the bit shift to the extended registers gives a wrong result, since the base offset is already included in the offset. Therefore, we have to add code to the 24 bit accessor functions that adjusts the register number for these exended registers. The formula finally used was developed and proposed by Andy Shevchenko <andy.shevchenko@gmail.com>. Suggested-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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H. Nikolaus Schaller authored
These mask bits are to be used to map the extended register addresses (which are defined for an unsupported 8-bit pcal chip) to 16 and 24 bit chips (pcal6524). Signed-off-by:
H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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H. Nikolaus Schaller authored
The of_device_table is missing the PCA_PCAL flag so the pcal6524 would be operated in tca6424 compatibility mode which does not handle the new interrupt mask registers. Suggested-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Grigoryev Denis authored
The driver stores the result of irq_set_type() in the internal variables irq_trig_raise and irq_trig_fall, which later are used to determine the GPIOs that must be re-configured as input. These variables retain their value between gpiolib's export / unexport, resulting in an incorrect state in some cases. The corresponding bits in the variables irq_trig_raise and irq_trig_fall should be cleared in irq_shutdown(). Signed-off-by:
Denis Grigoryev <grigoryev@fastwel.ru> Acked-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 16 May, 2018 2 commits
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H. Nikolaus Schaller authored
The pcal6524 has another set of registers to fine control the interrupt handling. Signed-off-by:
H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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H. Nikolaus Schaller authored
PCAL chips ("L" seems to stand for "latched") have additional registers starting at address 0x40 to control the latches, interrupt mask, pull-up and pull down etc. Signed-off-by:
H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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