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    mmc: sdhci-of-arasan: fix incorrect timeout clock · 16681037
    Anssi Hannula authored
    
    
    sdhci_arasan_get_timeout_clock() divides the frequency it has with (1 <<
    (13 + divisor)).
    
    However, the divisor is not some Arasan-specific value, but instead is
    just the Data Timeout Counter Value from the SDHCI Timeout Control
    Register.
    
    Applying it here like this is wrong as the sdhci driver already takes
    that value into account when calculating timeouts, and in fact it *sets*
    that register value based on how long a timeout is wanted.
    
    Additionally, sdhci core interprets the .get_timeout_clock callback
    return value as if it were read from hardware registers, i.e. the unit
    should be kHz or MHz depending on SDHCI_TIMEOUT_CLK_UNIT capability bit.
    This bit is set at least on the tested Zynq-7000 SoC.
    
    With the tested hardware (SDHCI_TIMEOUT_CLK_UNIT set) this results in
    too high a timeout clock rate being reported, causing the core to use
    longer-than-needed timeouts. Additionally, on a partitioned MMC
    (therefore having erase_group_def bit set) mmc_calc_max_discard()
    disables discard support as it looks like controller does not support
    the long timeouts needed for that.
    
    Do not apply the extra divisor and return the timeout clock in the
    expected unit.
    
    Tested with a Zynq-7000 SoC and a partitioned Toshiba THGBMAG5A1JBAWR
    eMMC card.
    
    Signed-off-by: default avatarAnssi Hannula <anssi.hannula@bitwise.fi>
    Fixes: e3ec3a3d
    
     ("mmc: arasan: Add driver for Arasan SDHCI")
    Cc: <stable@vger.kernel.org>
    Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
    16681037