Commit 0ae7d327 authored by Georgi Djakov's avatar Georgi Djakov Committed by Jassi Brar
Browse files

dt-bindings: mailbox: qcom: Document the APCS clock binding

Update the binding documentation for APCS to mention that the APCS
hardware block also expose a clock controller functionality.

The APCS clock controller is a mux and half-integer divider. It has the
main CPU PLL as an input and provides the clock for the application CPU.

Signed-off-by: default avatarGeorgi Djakov <>
Reviewed-by: default avatarRob Herring <>
Acked-by: default avatarBjorn Andersson <>
Signed-off-by: default avatarJassi Brar <>
parent c815d769
......@@ -15,12 +15,21 @@ platforms.
Usage: required
Value type: <prop-encoded-array>
Definition: must specify the base address and size of the global block
- clocks:
Usage: required if #clocks-cells property is present
Value type: <phandle>
Definition: phandle to the input PLL, which feeds the APCS mux/divider
- #mbox-cells:
Usage: required
Value type: <u32>
Definition: as described in mailbox.txt, must be 1
- #clock-cells:
Usage: optional
Value type: <u32>
Definition: as described in clock.txt, must be 0
The following example describes the APCS HMSS found in MSM8996 and part of the
......@@ -44,3 +53,12 @@ GLINK RPM referencing the "rpm_hlos" doorbell therein.
mbox-names = "rpm_hlos";
Below is another example of the APCS binding on MSM8916 platforms:
apcs: mailbox@b011000 {
compatible = "qcom,msm8916-apcs-kpss-global";
reg = <0xb011000 0x1000>;
#mbox-cells = <1>;
clocks = <&a53pll>;
#clock-cells = <0>;
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