Commit ddb3d12a authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Don't overestimate 4:2:0 link symbol clock



With 4:2:0 output the LS clock can be half of what it is with 4:4:4.
Make that happen.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190710125851.3275-1-ville.syrjala@linux.intel.com


Reviewed-by: default avatarGwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Tested-by: default avatarGwan-gyeong Mun <gwan-gyeong.mun@intel.com>
parent 86c9640b
......@@ -1854,8 +1854,10 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
int mode_rate, link_clock, link_avail;
for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
int output_bpp = intel_dp_output_bpp(pipe_config, bpp);
mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
bpp);
output_bpp);
for (clock = limits->min_clock; clock <= limits->max_clock; clock++) {
for (lane_count = limits->min_lane_count;
......
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