1. 25 Sep, 2019 1 commit
    • Maarten Lankhorst's avatar
      drm/i915/dp: Fix dsc bpp calculations, v5. · ed06efb8
      Maarten Lankhorst authored
      
      
      There was a integer wraparound when mode_clock became too high,
      and we didn't correct for the FEC overhead factor when dividing,
      with the calculations breaking at HBR3.
      
      As a result our calculated bpp was way too high, and the link width
      limitation never came into effect.
      
      Print out the resulting bpp calcululations as a sanity check, just
      in case we ever have to debug it later on again.
      
      We also used the wrong factor for FEC. While bspec mentions 2.4%,
      all the calculations use 1/0.972261, and the same ratio should be
      applied to data M/N as well, so use it there when FEC is enabled.
      
      This fixes the FIFO underrun we are seeing with FEC enabled.
      
      Changes since v2:
      - Handle fec_enable in intel_link_compute_m_n, so only data M/N is adjusted. (Ville)
      - Fix initial hardware readout for FEC. (Ville)
      Changes since v3:
      - Remove bogus fec_to_mode_clock. (Ville)
      Changes since v4:
      - Use the correct register for icl. (Ville)
      - Split hw readout to a separate patch.
      Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Fixes: d9218c8f ("drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC")
      Cc: <stable@vger.kernel.org> # v5.0+
      Cc: Manasi Navare <manasi.d.navare@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190925082110.17439-1-maarten.lankhorst@linux.intel.com
      
      Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      ed06efb8
  2. 30 Aug, 2019 1 commit
  3. 01 Jul, 2019 1 commit
  4. 17 Jun, 2019 1 commit
  5. 23 May, 2019 1 commit
    • Gwan-gyeong Mun's avatar
      drm/i915/dp: Add a config function for YCBCR420 outputs · 8e9d645c
      Gwan-gyeong Mun authored
      
      
      This patch checks a support of YCBCR420 outputs on an encoder level.
      If the input mode is YCBCR420-only mode then it prepares DP as an YCBCR420
      output, else it continues with RGB output mode.
      It set output_format to INTEL_OUTPUT_FORMAT_YCBCR420 in order to using
      a pipe scaler as RGB to YCbCr 4:4:4.
      
      v2:
        Addressed review comments from Ville.
        Style fixed with few naming.
        %s/config/crtc_state/
        %s/intel_crtc/crtc/
        If lscon is active, it makes not to call intel_dp_ycbcr420_config()
        to avoid to clobber of lspcon_ycbcr420_config() routine.
        And it move the 420_only check into the intel_dp_ycbcr420_config().
      
      v3: Fix uninitialized return value and it is reported by Dan Carpenter.
      
      v4:
        Addressed review comments from Ville.
        In order to avoid the extra indentation, it inverts if-clause on
        intel_dp_ycbcr420_config().
        Remove the error print where no errors print are allowed.
      
      v6: Rebase
      
      v7:
        Move intel_dp_get_colorimetry_status() to intel_dp from intel_psr.
        intel_dp_get_colorimetry_status() checks
        VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the
        DPRX_FEATURE_ENUMERATION_LIST register.
        And intel_dp_ycbcr420_config() uses intel_dp_get_colorimetry_status().
      
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: default avatarGwan-gyeong Mun <gwan-gyeong.mun@intel.com>
      Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190521121721.32010-2-gwan-gyeong.mun@intel.com
      8e9d645c
  6. 11 Apr, 2019 1 commit
  7. 08 Apr, 2019 1 commit
  8. 07 Dec, 2009 1 commit
  9. 18 Jun, 2009 1 commit