• Kazuya Mizuguchi's avatar
    ravb: Add dma queue interrupt support · f51bdc23
    Kazuya Mizuguchi authored
    This patch supports the following interrupts.
    - One interrupt for multiple (timestamp, error, gPTP)
    - One interrupt for emac
    - Four interrupts for dma queue (best effort rx/tx, network control rx/tx)
    This patch improve efficiency of the interrupt handler by adding the
    interrupt handler corresponding to each interrupt source described
    above. Additionally, it reduces the number of times of the access to
    EthernetAVB IF.
    Also this patch prevent this driver depends on the whim of a boot loader.
    [ykaneko0929@gmail.com: define bit names of registers]
    [ykaneko0929@gmail.com: add comment for gen3 only registers]
    [ykaneko0929@gmail.com: fix coding style]
    [ykaneko0929@gmail.com: update changelog]
    [ykaneko0929@gmail.com: gen3: fix initialization of interrupts]
    [ykaneko0929@gmail.com: gen3: fix clearing interrupts]
    [ykaneko0929@gmail.com: gen3: add helper function for request_irq()]
    [ykaneko0929@gmail.com: gen3: remove IRQF_SHARED flag for request_irq()]
    [ykaneko0929@gmail.com: revert ravb_close() and ravb_ptp_stop()]
    [ykaneko0929@gmail.com: avoid calling free_irq() to non-hooked interrupts]
    [ykaneko0929@gmail.com: make NC/BE interrupt handler a function]
    [ykaneko0929@gmail.com: make timestamp interrupt handler a function]
    [ykaneko0929@gmail.com: timestamp interrupt is handled in multiple
     interrupt handler instead of dma queue interrupt handler]
    Signed-off-by: default avatarKazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
    Signed-off-by: default avatarYoshihiro Kaneko <ykaneko0929@gmail.com>
    Acked-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>