Commit 1092f698 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge 5.10.15 into android12-5.10



Changes in 5.10.15
	USB: serial: cp210x: add pid/vid for WSDA-200-USB
	USB: serial: cp210x: add new VID/PID for supporting Teraoka AD2000
	USB: serial: option: Adding support for Cinterion MV31
	usb: host: xhci: mvebu: make USB 3.0 PHY optional for Armada 3720
	USB: gadget: legacy: fix an error code in eth_bind()
	usb: gadget: aspeed: add missing of_node_put
	USB: usblp: don't call usb_set_interface if there's a single alt
	usb: renesas_usbhs: Clear pipe running flag in usbhs_pkt_pop()
	usb: dwc2: Fix endpoint direction check in ep_from_windex
	usb: dwc3: fix clock issue during resume in OTG mode
	usb: xhci-mtk: fix unreleased bandwidth data
	usb: xhci-mtk: skip dropping bandwidth of unchecked endpoints
	usb: xhci-mtk: break loop when find the endpoint to drop
	ARM: OMAP1: OSK: fix ohci-omap breakage
	arm64: dts: qcom: c630: keep both touchpad devices enabled
	Input: i8042 - unbreak Pegatron C15B
	arm64: dts: amlogic: meson-g12: Set FL-adj property value
	arm64: dts: rockchip: fix vopl iommu irq on px30
	arm64: dts: rockchip: Use only supported PCIe link speed on Pinebook Pro
	ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect
	ARM: dts: stm32: Connect card-detect signal on DHCOM
	ARM: dts: stm32: Disable WP on DHCOM uSD slot
	ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
	ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
	vdpa/mlx5: Fix memory key MTT population
	bpf, cgroup: Fix optlen WARN_ON_ONCE toctou
	bpf, cgroup: Fix problematic bounds check
	bpf, inode_storage: Put file handler if no storage was found
	um: virtio: free vu_dev only with the contained struct device
	bpf, preload: Fix build when $(O) points to a relative path
	arm64: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4
	r8169: work around RTL8125 UDP hw bug
	rxrpc: Fix deadlock around release of dst cached on udp tunnel
	arm64: dts: ls1046a: fix dcfg address range
	SUNRPC: Fix NFS READs that start at non-page-aligned offsets
	igc: set the default return value to -IGC_ERR_NVM in igc_write_nvm_srwr
	igc: check return value of ret_val in igc_config_fc_after_link_up
	i40e: Revert "i40e: don't report link up for a VF who hasn't enabled queues"
	ibmvnic: device remove has higher precedence over reset
	net/mlx5: Fix function calculation for page trees
	net/mlx5: Fix leak upon failure of rule creation
	net/mlx5e: Update max_opened_tc also when channels are closed
	net/mlx5e: Release skb in case of failure in tc update skb
	net: lapb: Copy the skb before sending a packet
	net: mvpp2: TCAM entry enable should be written after SRAM data
	r8169: fix WoL on shutdown if CONFIG_DEBUG_SHIRQ is set
	net: ipa: pass correct dma_handle to dma_free_coherent()
	ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
	nvmet-tcp: fix out-of-bounds access when receiving multiple h2cdata PDUs
	vdpa/mlx5: Restore the hardware used index after change map
	memblock: do not start bottom-up allocations with kernel_end
	kbuild: fix duplicated flags in DEBUG_CFLAGS
	thunderbolt: Fix possible NULL pointer dereference in tb_acpi_add_link()
	ovl: fix dentry leak in ovl_get_redirect
	ovl: avoid deadlock on directory ioctl
	ovl: implement volatile-specific fsync error behaviour
	mac80211: fix station rate table updates on assoc
	gpiolib: free device name on error path to fix kmemleak
	fgraph: Initialize tracing_graph_pause at task creation
	tracing/kprobe: Fix to support kretprobe events on unloaded modules
	kretprobe: Avoid re-registration of the same kretprobe earlier
	tracing: Use pause-on-trace with the latency tracers
	tracepoint: Fix race between tracing and removing tracepoint
	libnvdimm/namespace: Fix visibility of namespace resource attribute
	libnvdimm/dimm: Avoid race between probe and available_slots_show()
	genirq: Prevent [devm_]irq_alloc_desc from returning irq 0
	genirq/msi: Activate Multi-MSI early when MSI_FLAG_ACTIVATE_EARLY is set
	scripts: use pkg-config to locate libcrypto
	xhci: fix bounce buffer usage for non-sg list case
	RISC-V: Define MAXPHYSMEM_1GB only for RV32
	cifs: report error instead of invalid when revalidating a dentry fails
	iommu: Check dev->iommu in dev_iommu_priv_get() before dereferencing it
	smb3: Fix out-of-bounds bug in SMB2_negotiate()
	smb3: fix crediting for compounding when only one request in flight
	mmc: sdhci-pltfm: Fix linking err for sdhci-brcmstb
	mmc: core: Limit retries when analyse of SDIO tuples fails
	Fix unsynchronized access to sev members through svm_register_enc_region
	drm/dp/mst: Export drm_dp_get_vc_payload_bw()
	drm/i915: Fix the MST PBN divider calculation
	drm/i915/gem: Drop lru bumping on display unpinning
	drm/i915/gt: Close race between enable_breadcrumbs and cancel_breadcrumbs
	drm/i915/display: Prevent double YUV range correction on HDR planes
	drm/i915: Extract intel_ddi_power_up_lanes()
	drm/i915: Power up combo PHY lanes for for HDMI as well
	drm/amd/display: Revert "Fix EDID parsing after resume from suspend"
	io_uring: don't modify identity's files uncess identity is cowed
	nvme-pci: avoid the deepest sleep state on Kingston A2000 SSDs
	KVM: SVM: Treat SVM as unsupported when running as an SEV guest
	KVM: x86/mmu: Fix TDP MMU zap collapsible SPTEs
	KVM: x86: Allow guests to see MSR_IA32_TSX_CTRL even if tsx=off
	KVM: x86: fix CPUID entries returned by KVM_GET_CPUID2 ioctl
	KVM: x86: Update emulator context mode if SYSENTER xfers to 64-bit mode
	KVM: x86: Set so called 'reserved CR3 bits in LM mask' at vCPU reset
	DTS: ARM: gta04: remove legacy spi-cs-high to make display work again
	ARM: dts; gta04: SPI panel chip select is active low
	ARM: footbridge: fix dc21285 PCI configuration accessors
	ARM: 9043/1: tegra: Fix misplaced tegra_uart_config in decompressor
	mm: hugetlbfs: fix cannot migrate the fallocated HugeTLB page
	mm: hugetlb: fix a race between freeing and dissolving the page
	mm: hugetlb: fix a race between isolating and freeing page
	mm: hugetlb: remove VM_BUG_ON_PAGE from page_huge_active
	mm, compaction: move high_pfn to the for loop scope
	mm/vmalloc: separate put pages and flush VM flags
	mm: thp: fix MADV_REMOVE deadlock on shmem THP
	mm/filemap: add missing mem_cgroup_uncharge() to __add_to_page_cache_locked()
	x86/build: Disable CET instrumentation in the kernel
	x86/debug: Fix DR6 handling
	x86/debug: Prevent data breakpoints on __per_cpu_offset
	x86/debug: Prevent data breakpoints on cpu_dr7
	x86/apic: Add extra serialization for non-serializing MSRs
	Input: goodix - add support for Goodix GT9286 chip
	Input: xpad - sync supported devices with fork on GitHub
	Input: ili210x - implement pressure reporting for ILI251x
	md: Set prev_flush_start and flush_bio in an atomic way
	igc: Report speed and duplex as unknown when device is runtime suspended
	neighbour: Prevent a dead entry from updating gc_list
	net: ip_tunnel: fix mtu calculation
	udp: ipv4: manipulate network header of NATed UDP GRO fraglist
	net: dsa: mv88e6xxx: override existent unicast portvec in port_fdb_add
	net: sched: replaced invalid qdisc tree flush helper in qdisc_replace
	Linux 5.10.15
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
Change-Id: I15750357b4c30739515fdc0bbbd0e04b7c986171
parents 3e2354da 2d18b3ee
......@@ -598,6 +598,14 @@ without significant effort.
The advantage of mounting with the "volatile" option is that all forms of
sync calls to the upper filesystem are omitted.
In order to avoid a giving a false sense of safety, the syncfs (and fsync)
semantics of volatile mounts are slightly different than that of the rest of
VFS. If any writeback error occurs on the upperdir's filesystem after a
volatile mount takes place, all sync functions will return an error. Once this
condition is reached, the filesystem will not recover, and every subsequent sync
call will return an error, even if the upperdir has not experience a new error
since the last sync call.
When overlay is mounted with "volatile" option, the directory
"$workdir/work/incompat/volatile" is created. During next mount, overlay
checks for this directory and refuses to mount if present. This is a strong
......
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 10
SUBLEVEL = 14
SUBLEVEL = 15
EXTRAVERSION =
NAME = Kleptomaniac Octopus
......@@ -813,10 +813,12 @@ KBUILD_CFLAGS += -ftrivial-auto-var-init=zero
KBUILD_CFLAGS += -enable-trivial-auto-var-init-zero-knowing-it-will-be-removed-from-clang
endif
DEBUG_CFLAGS :=
# Workaround for GCC versions < 5.0
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61801
ifdef CONFIG_CC_IS_GCC
DEBUG_CFLAGS := $(call cc-ifversion, -lt, 0500, $(call cc-option, -fno-var-tracking-assignments))
DEBUG_CFLAGS += $(call cc-ifversion, -lt, 0500, $(call cc-option, -fno-var-tracking-assignments))
endif
ifdef CONFIG_DEBUG_INFO
......@@ -987,12 +989,6 @@ KBUILD_CFLAGS += $(call cc-option,-Werror=designated-init)
# change __FILE__ to the relative path from the srctree
KBUILD_CPPFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)
# ensure -fcf-protection is disabled when using retpoline as it is
# incompatible with -mindirect-branch=thunk-extern
ifdef CONFIG_RETPOLINE
KBUILD_CFLAGS += $(call cc-option,-fcf-protection=none)
endif
# include additional Makefiles when needed
include-y := scripts/Makefile.extrawarn
include-$(CONFIG_KASAN) += scripts/Makefile.kasan
......
......@@ -114,7 +114,7 @@
gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio1 18 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio1 20 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
/* lcd panel */
......@@ -124,7 +124,6 @@
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
spi-cs-high;
backlight= <&backlight>;
label = "lcd";
......
......@@ -35,7 +35,7 @@
*/
rs485-rx-en {
gpio-hog;
gpios = <8 GPIO_ACTIVE_HIGH>;
gpios = <8 0>;
output-low;
line-name = "rs485-rx-en";
};
......@@ -63,7 +63,7 @@
*/
usb-hub {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
gpios = <2 0>;
output-high;
line-name = "usb-hub-reset";
};
......@@ -87,6 +87,12 @@
};
};
&i2c4 {
touchscreen@49 {
status = "disabled";
};
};
&i2c5 { /* TP7/TP8 */
pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins_a>;
......@@ -104,7 +110,7 @@
* are used for on-board microSD slot instead.
*/
/delete-property/broken-cd;
cd-gpios = <&gpioi 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
disable-wp;
};
......
......@@ -353,7 +353,8 @@
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
broken-cd;
cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp;
st,sig-dir;
st,neg-edge;
st,use-ckin;
......
......@@ -110,7 +110,7 @@
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};
......
......@@ -149,7 +149,34 @@
.align
99: .word .
#if defined(ZIMAGE)
.word . + 4
/*
* Storage for the state maintained by the macro.
*
* In the kernel proper, this data is located in arch/arm/mach-tegra/tegra.c.
* That's because this header is included from multiple files, and we only
* want a single copy of the data. In particular, the UART probing code above
* assumes it's running using physical addresses. This is true when this file
* is included from head.o, but not when included from debug.o. So we need
* to share the probe results between the two copies, rather than having
* to re-run the probing again later.
*
* In the decompressor, we put the storage right here, since common.c
* isn't included in the decompressor build. This storage data gets put in
* .text even though it's really data, since .data is discarded from the
* decompressor. Luckily, .text is writeable in the decompressor, unless
* CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug.
*/
/* Debug UART initialization required */
.word 1
/* Debug UART physical address */
.word 0
/* Debug UART virtual address */
.word 0
#else
.word tegra_uart_config
#endif
.ltorg
/* Load previously selected UART address */
......@@ -189,30 +216,3 @@
.macro waituarttxrdy,rd,rx
.endm
/*
* Storage for the state maintained by the macros above.
*
* In the kernel proper, this data is located in arch/arm/mach-tegra/tegra.c.
* That's because this header is included from multiple files, and we only
* want a single copy of the data. In particular, the UART probing code above
* assumes it's running using physical addresses. This is true when this file
* is included from head.o, but not when included from debug.o. So we need
* to share the probe results between the two copies, rather than having
* to re-run the probing again later.
*
* In the decompressor, we put the symbol/storage right here, since common.c
* isn't included in the decompressor build. This symbol gets put in .text
* even though it's really data, since .data is discarded from the
* decompressor. Luckily, .text is writeable in the decompressor, unless
* CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug.
*/
#if defined(ZIMAGE)
tegra_uart_config:
/* Debug UART initialization required */
.word 1
/* Debug UART physical address */
.word 0
/* Debug UART virtual address */
.word 0
#endif
......@@ -65,15 +65,15 @@ dc21285_read_config(struct pci_bus *bus, unsigned int devfn, int where,
if (addr)
switch (size) {
case 1:
asm("ldrb %0, [%1, %2]"
asm volatile("ldrb %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where) : "cc");
break;
case 2:
asm("ldrh %0, [%1, %2]"
asm volatile("ldrh %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where) : "cc");
break;
case 4:
asm("ldr %0, [%1, %2]"
asm volatile("ldr %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where) : "cc");
break;
}
......@@ -99,17 +99,17 @@ dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where,
if (addr)
switch (size) {
case 1:
asm("strb %0, [%1, %2]"
asm volatile("strb %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where)
: "cc");
break;
case 2:
asm("strh %0, [%1, %2]"
asm volatile("strh %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where)
: "cc");
break;
case 4:
asm("str %0, [%1, %2]"
asm volatile("str %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where)
: "cc");
break;
......
......@@ -203,6 +203,8 @@ static int osk_tps_setup(struct i2c_client *client, void *context)
*/
gpio_request(OSK_TPS_GPIO_USB_PWR_EN, "n_vbus_en");
gpio_direction_output(OSK_TPS_GPIO_USB_PWR_EN, 1);
/* Free the GPIO again as the driver will request it */
gpio_free(OSK_TPS_GPIO_USB_PWR_EN);
/* Set GPIO 2 high so LED D3 is off by default */
tps65010_set_gpio_out_value(GPIO2, HIGH);
......
......@@ -2384,7 +2384,7 @@
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
snps,dis_u2_susphy_quirk;
snps,quirk-frame-length-adjustment;
snps,quirk-frame-length-adjustment = <0x20>;
snps,parkmode-disable-ss-quirk;
};
};
......
......@@ -52,7 +52,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>;
enable-active-high;
regulator-always-on;
};
......
......@@ -385,7 +385,7 @@
dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1046a-dcfg", "syscon";
reg = <0x0 0x1ee0000 0x0 0x10000>;
reg = <0x0 0x1ee0000 0x0 0x1000>;
big-endian;
};
......
......@@ -263,6 +263,8 @@
&i2c3 {
status = "okay";
clock-frequency = <400000>;
/* Overwrite pinctrl-0 from sdm845.dtsi */
pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
tsel: hid@15 {
compatible = "hid-over-i2c";
......@@ -270,9 +272,6 @@
hid-descr-addr = <0x1>;
interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_hid_active>;
};
tsc2: hid@2c {
......@@ -281,11 +280,6 @@
hid-descr-addr = <0x20>;
interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_hid_active>;
status = "disabled";
};
};
......
......@@ -1097,7 +1097,7 @@
vopl_mmu: iommu@ff470f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xff470f00 0x0 0x100>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopl_mmu";
clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>;
clock-names = "aclk", "iface";
......
......@@ -790,7 +790,6 @@
&pcie0 {
bus-scan-delay-ms = <1000>;
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
max-link-speed = <2>;
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>;
......
......@@ -252,8 +252,10 @@ choice
default MAXPHYSMEM_128GB if 64BIT && CMODEL_MEDANY
config MAXPHYSMEM_1GB
depends on 32BIT
bool "1GiB"
config MAXPHYSMEM_2GB
depends on 64BIT && CMODEL_MEDLOW
bool "2GiB"
config MAXPHYSMEM_128GB
depends on 64BIT && CMODEL_MEDANY
......
......@@ -1083,6 +1083,7 @@ static void virtio_uml_release_dev(struct device *d)
}
os_close_file(vu_dev->sock);
kfree(vu_dev);
}
/* Platform device */
......@@ -1096,7 +1097,7 @@ static int virtio_uml_probe(struct platform_device *pdev)
if (!pdata)
return -EINVAL;
vu_dev = devm_kzalloc(&pdev->dev, sizeof(*vu_dev), GFP_KERNEL);
vu_dev = kzalloc(sizeof(*vu_dev), GFP_KERNEL);
if (!vu_dev)
return -ENOMEM;
......
......@@ -127,6 +127,9 @@ else
KBUILD_CFLAGS += -mno-red-zone
KBUILD_CFLAGS += -mcmodel=kernel
# Intel CET isn't enabled in the kernel
KBUILD_CFLAGS += $(call cc-option,-fcf-protection=none)
endif
ifdef CONFIG_X86_X32
......
......@@ -197,16 +197,6 @@ static inline bool apic_needs_pit(void) { return true; }
#endif /* !CONFIG_X86_LOCAL_APIC */
#ifdef CONFIG_X86_X2APIC
/*
* Make previous memory operations globally visible before
* sending the IPI through x2apic wrmsr. We need a serializing instruction or
* mfence for this.
*/
static inline void x2apic_wrmsr_fence(void)
{
asm volatile("mfence" : : : "memory");
}
static inline void native_apic_msr_write(u32 reg, u32 v)
{
if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
......
......@@ -84,4 +84,22 @@ do { \
#include <asm-generic/barrier.h>
/*
* Make previous memory operations globally visible before
* a WRMSR.
*
* MFENCE makes writes visible, but only affects load/store
* instructions. WRMSR is unfortunately not a load/store
* instruction and is unaffected by MFENCE. The LFENCE ensures
* that the WRMSR is not reordered.
*
* Most WRMSRs are full serializing instructions themselves and
* do not require this barrier. This is only required for the
* IA32_TSC_DEADLINE and X2APIC MSRs.
*/
static inline void weak_wrmsr_fence(void)
{
asm volatile("mfence; lfence" : : : "memory");
}
#endif /* _ASM_X86_BARRIER_H */
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