Commit b6f1ffed authored by m-karicheri2@ti.com's avatar m-karicheri2@ti.com Committed by Sekhar Nori
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ARM: davinci: convert platform code to use clk_prepare/clk_unprepare



As a first step towards migrating davinci platforms to use common clock
framework, replace all instances of clk_enable() with clk_prepare_enable()
and clk_disable() with clk_disable_unprepare(). Until the platform is
switched to use the CONFIG_HAVE_CLK_PREPARE Kconfig variable, this just
adds a might_sleep() call and would work without any issues.

This will make it easy later to switch to common clk based implementation
of clk driver from DaVinci specific driver.

Signed-off-by: default avatarMurali Karicheri <m-karicheri2@ti.com>
Reviewed-by: default avatarMike Turquette <mturquette@linaro.org>
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
parent 6f0c0580
......@@ -324,7 +324,7 @@ static __init void dm355_evm_init(void)
if (IS_ERR(aemif))
WARN("%s: unable to get AEMIF clock\n", __func__);
else
clk_enable(aemif);
clk_prepare_enable(aemif);
platform_add_devices(davinci_evm_devices,
ARRAY_SIZE(davinci_evm_devices));
......
......@@ -246,7 +246,7 @@ static __init void dm355_leopard_init(void)
if (IS_ERR(aemif))
WARN("%s: unable to get AEMIF clock\n", __func__);
else
clk_enable(aemif);
clk_prepare_enable(aemif);
platform_add_devices(davinci_leopard_devices,
ARRAY_SIZE(davinci_leopard_devices));
......
......@@ -478,7 +478,7 @@ static void __init evm_init_cpld(void)
aemif_clk = clk_get(NULL, "aemif");
if (IS_ERR(aemif_clk))
return;
clk_enable(aemif_clk);
clk_prepare_enable(aemif_clk);
if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE,
"cpld") == NULL)
......@@ -489,7 +489,7 @@ static void __init evm_init_cpld(void)
SECTION_SIZE);
fail:
pr_err("ERROR: can't map CPLD\n");
clk_disable(aemif_clk);
clk_disable_unprepare(aemif_clk);
return;
}
......
......@@ -776,7 +776,7 @@ static __init void davinci_evm_init(void)
struct davinci_soc_info *soc_info = &davinci_soc_info;
aemif_clk = clk_get(NULL, "aemif");
clk_enable(aemif_clk);
clk_prepare_enable(aemif_clk);
if (HAS_ATA) {
if (HAS_NAND || HAS_NOR)
......
......@@ -188,7 +188,7 @@ static __init void davinci_ntosd2_init(void)
struct davinci_soc_info *soc_info = &davinci_soc_info;
aemif_clk = clk_get(NULL, "aemif");
clk_enable(aemif_clk);
clk_prepare_enable(aemif_clk);
if (HAS_ATA) {
if (HAS_NAND)
......
......@@ -900,7 +900,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr)
if (IS_ERR(da850_sata_clk))
return PTR_ERR(da850_sata_clk);
ret = clk_enable(da850_sata_clk);
ret = clk_prepare_enable(da850_sata_clk);
if (ret)
goto err0;
......@@ -931,7 +931,7 @@ static int da850_sata_init(struct device *dev, void __iomem *addr)
return 0;
err1:
clk_disable(da850_sata_clk);
clk_disable_unprepare(da850_sata_clk);
err0:
clk_put(da850_sata_clk);
return ret;
......@@ -939,7 +939,7 @@ err0:
static void da850_sata_exit(struct device *dev)
{
clk_disable(da850_sata_clk);
clk_disable_unprepare(da850_sata_clk);
clk_put(da850_sata_clk);
}
......
......@@ -95,7 +95,7 @@ int __init davinci_serial_init(struct davinci_uart_config *info)
continue;
}
clk_enable(uart_clk);
clk_prepare_enable(uart_clk);
p->uartclk = clk_get_rate(uart_clk);
if (!p->membase && p->mapbase) {
......
......@@ -379,7 +379,7 @@ static void __init davinci_timer_init(void)
timer_clk = clk_get(NULL, "timer0");
BUG_ON(IS_ERR(timer_clk));
clk_enable(timer_clk);
clk_prepare_enable(timer_clk);
/* init timer hw */
timer_init();
......@@ -429,7 +429,7 @@ void davinci_watchdog_reset(struct platform_device *pdev)
wd_clk = clk_get(&pdev->dev, NULL);
if (WARN_ON(IS_ERR(wd_clk)))
return;
clk_enable(wd_clk);
clk_prepare_enable(wd_clk);
/* disable, internal clock source */
__raw_writel(0, base + TCR);
......
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