Commit eac1cd3b authored by George Cherian's avatar George Cherian Committed by Tony Lindgren
Browse files

ARM: dts: am43xx clock data



Add USB and USB PHY reference clock data

Signed-off-by: default avatarGeorge Cherian <george.cherian@ti.com>
Acked-by: default avatarRoger Quadros <rogerq@ti.com>
Acked-by: default avatarFelipe Balbi <balbi@ti.com>
[tony@atomide.com: tabified]
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 08593fa6
......@@ -653,4 +653,36 @@
clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>;
reg = <0x4260>;
};
usb_phy0_always_on_clk32k: usb_phy0_always_on_clk32k {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&usbphy_32khz_clkmux>;
ti,bit-shift = <8>;
reg = <0x2a40>;
};
usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&usbphy_32khz_clkmux>;
ti,bit-shift = <8>;
reg = <0x2a48>;
};
usb_otg_ss0_refclk960m: usb_otg_ss0_refclk960m {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&dpll_per_clkdcoldo>;
ti,bit-shift = <8>;
reg = <0x8a60>;
};
usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&dpll_per_clkdcoldo>;
ti,bit-shift = <8>;
reg = <0x8a68>;
};
};
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