Commit 3b30bfab authored by Stephen Rothwell's avatar Stephen Rothwell
Browse files

Merge remote-tracking branch 'rtc/rtc-next'

parents 1cfd65d0 7d6bec28
......@@ -20,6 +20,7 @@ properties:
- atmel,sama5d4-rtc
- atmel,sama5d2-rtc
- microchip,sam9x60-rtc
- microchip,sama7g5-rtc
reg:
maxItems: 1
......
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/rtc/nxp,pcf2127.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP PCF2127 Real Time Clock
allOf:
- $ref: "rtc.yaml#"
maintainers:
- Alexandre Belloni <alexandre.belloni@bootlin.com>
properties:
compatible:
const: nxp,pcf2127
reg:
maxItems: 1
interrupts:
maxItems: 1
start-year: true
reset-source: true
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
rtc@51 {
compatible = "nxp,pcf2127";
reg = <0x51>;
pinctrl-0 = <&rtc_nint_pins>;
interrupts-extended = <&gpio1 16 IRQ_TYPE_LEVEL_HIGH>;
reset-source;
};
};
...
SiRFSoC Real Time Clock
Required properties:
- compatible: must be "sirf,prima2-sysrtc"
- reg: address range of rtc register set.
- interrupts: rtc alarm interrupts.
Example:
rtc@2000 {
compatible = "sirf,prima2-sysrtc";
reg = <0x2000 0x1000>;
interrupts = <52 53 54>;
};
ST-Ericsson COH 901 331 Real Time Clock
Required properties:
- compatible: must be "stericsson,coh901331"
- reg: address range of rtc register set.
- interrupts: rtc alarm interrupt.
- clocks: phandle to the rtc clock source
Example:
rtc: rtc@c0017000 {
compatible = "stericsson,coh901331";
reg = <0xc0017000 0x1000>;
interrupt-parent = <&vicb>;
interrupts = <10>;
clocks = <&rtc_clk>;
};
......@@ -48,12 +48,8 @@ properties:
- microcrystal,rv3029
# Real Time Clock
- microcrystal,rv8523
# Real-time clock
- nxp,pcf2127
# Real-time clock
- nxp,pcf2129
# Real-time clock
- nxp,pca2129
- nxp,pcf2129
# Real-time Clock Module
- pericom,pt7c4338
# I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
......
......@@ -692,6 +692,7 @@ config RTC_DRV_S5M
tristate "Samsung S2M/S5M series"
depends on MFD_SEC_CORE || COMPILE_TEST
select REGMAP_IRQ
select REGMAP_I2C
help
If you say yes here you will get support for the
RTC of Samsung S2MPS14 and S5M PMIC series.
......@@ -1258,14 +1259,6 @@ config RTC_DRV_PCF50633
If you say yes here you get support for the RTC subsystem of the
NXP PCF50633 used in embedded systems.
config RTC_DRV_AB3100
tristate "ST-Ericsson AB3100 RTC"
depends on AB3100_CORE
default y if AB3100_CORE
help
Select this to enable the ST-Ericsson AB3100 Mixed Signal IC RTC
support. This chip contains a battery- and capacitor-backed RTC.
config RTC_DRV_AB8500
tristate "ST-Ericsson AB8500 RTC"
depends on AB8500_CORE
......@@ -1288,7 +1281,7 @@ config RTC_DRV_OPAL
config RTC_DRV_ZYNQMP
tristate "Xilinx Zynq Ultrascale+ MPSoC RTC"
depends on OF
depends on OF && HAS_IOMEM
help
If you say yes here you get support for the RTC controller found on
Xilinx Zynq Ultrascale+ MPSoC.
......@@ -1575,13 +1568,6 @@ config RTC_DRV_STARFIRE
If you say Y here you will get support for the RTC found on
Starfire systems.
config RTC_DRV_TX4939
tristate "TX4939 SoC"
depends on SOC_TX4939 || COMPILE_TEST
help
Driver for the internal RTC (Realtime Clock) module found on
Toshiba TX4939 SoC.
config RTC_DRV_MV
tristate "Marvell SoC RTC"
depends on ARCH_DOVE || ARCH_MVEBU || COMPILE_TEST
......@@ -1596,6 +1582,7 @@ config RTC_DRV_MV
config RTC_DRV_ARMADA38X
tristate "Armada 38x Marvell SoC RTC"
depends on ARCH_MVEBU || COMPILE_TEST
depends on OF
help
If you say yes here you will get support for the in-chip RTC
that can be found in the Armada 38x Marvell's SoC device
......@@ -1633,18 +1620,6 @@ config RTC_DRV_PS3
This driver can also be built as a module. If so, the module
will be called rtc-ps3.
config RTC_DRV_COH901331
tristate "ST-Ericsson COH 901 331 RTC"
depends on ARCH_U300 || COMPILE_TEST
help
If you say Y here you will get access to ST-Ericsson
COH 901 331 RTC clock found in some ST-Ericsson Mobile
Platforms.
This driver can also be built as a module. If so, the module
will be called "rtc-coh901331".
config RTC_DRV_STMP
tristate "Freescale STMP3xxx/i.MX23/i.MX28 RTC"
depends on ARCH_MXS || COMPILE_TEST
......@@ -1787,13 +1762,6 @@ config RTC_DRV_IMX_SC
If you say yes here you get support for the NXP i.MX System
Controller RTC module.
config RTC_DRV_SIRFSOC
tristate "SiRFSOC RTC"
depends on ARCH_SIRF
help
Say "yes" here to support the real time clock on SiRF SOC chips.
This driver can also be built as a module called rtc-sirfsoc.
config RTC_DRV_ST_LPC
tristate "STMicroelectronics LPC RTC"
depends on ARCH_STI
......
......@@ -19,7 +19,6 @@ rtc-core-$(CONFIG_RTC_INTF_SYSFS) += sysfs.o
obj-$(CONFIG_RTC_DRV_88PM80X) += rtc-88pm80x.o
obj-$(CONFIG_RTC_DRV_88PM860X) += rtc-88pm860x.o
obj-$(CONFIG_RTC_DRV_AB3100) += rtc-ab3100.o
obj-$(CONFIG_RTC_DRV_AB8500) += rtc-ab8500.o
obj-$(CONFIG_RTC_DRV_ABB5ZES3) += rtc-ab-b5ze-s3.o
obj-$(CONFIG_RTC_DRV_ABEOZ9) += rtc-ab-eoz9.o
......@@ -38,7 +37,6 @@ obj-$(CONFIG_RTC_DRV_BQ4802) += rtc-bq4802.o
obj-$(CONFIG_RTC_DRV_BRCMSTB) += rtc-brcmstb-waketimer.o
obj-$(CONFIG_RTC_DRV_CADENCE) += rtc-cadence.o
obj-$(CONFIG_RTC_DRV_CMOS) += rtc-cmos.o
obj-$(CONFIG_RTC_DRV_COH901331) += rtc-coh901331.o
obj-$(CONFIG_RTC_DRV_CPCAP) += rtc-cpcap.o
obj-$(CONFIG_RTC_DRV_CROS_EC) += rtc-cros-ec.o
obj-$(CONFIG_RTC_DRV_DA9052) += rtc-da9052.o
......@@ -154,7 +152,6 @@ obj-$(CONFIG_RTC_DRV_SA1100) += rtc-sa1100.o
obj-$(CONFIG_RTC_DRV_SC27XX) += rtc-sc27xx.o
obj-$(CONFIG_RTC_DRV_SD3078) += rtc-sd3078.o
obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o
obj-$(CONFIG_RTC_DRV_SIRFSOC) += rtc-sirfsoc.o
obj-$(CONFIG_RTC_DRV_SNVS) += rtc-snvs.o
obj-$(CONFIG_RTC_DRV_SPEAR) += rtc-spear.o
obj-$(CONFIG_RTC_DRV_STARFIRE) += rtc-starfire.o
......@@ -171,7 +168,6 @@ obj-$(CONFIG_RTC_DRV_TPS6586X) += rtc-tps6586x.o
obj-$(CONFIG_RTC_DRV_TPS65910) += rtc-tps65910.o
obj-$(CONFIG_RTC_DRV_TPS80031) += rtc-tps80031.o
obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl.o
obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o
obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o
obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o
obj-$(CONFIG_RTC_DRV_VT8500) += rtc-vt8500.o
......
......@@ -231,6 +231,8 @@ static struct rtc_device *rtc_allocate_device(void)
rtc->pie_timer.function = rtc_pie_update_irq;
rtc->pie_enabled = 0;
set_bit(RTC_FEATURE_ALARM, rtc->features);
return rtc;
}
......@@ -322,11 +324,6 @@ static void rtc_device_get_offset(struct rtc_device *rtc)
rtc->offset_secs = 0;
}
/**
* rtc_device_unregister - removes the previously registered RTC class device
*
* @rtc: the RTC class device to destroy
*/
static void devm_rtc_unregister_device(void *data)
{
struct rtc_device *rtc = data;
......@@ -386,6 +383,9 @@ int __devm_rtc_register_device(struct module *owner, struct rtc_device *rtc)
return -EINVAL;
}
if (!rtc->ops->set_alarm)
clear_bit(RTC_FEATURE_ALARM, rtc->features);
rtc->owner = owner;
rtc_device_get_offset(rtc);
......
......@@ -186,7 +186,7 @@ static int rtc_read_alarm_internal(struct rtc_device *rtc,
if (!rtc->ops) {
err = -ENODEV;
} else if (!rtc->ops->read_alarm) {
} else if (!test_bit(RTC_FEATURE_ALARM, rtc->features) || !rtc->ops->read_alarm) {
err = -EINVAL;
} else {
alarm->enabled = 0;
......@@ -392,7 +392,7 @@ int rtc_read_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
return err;
if (!rtc->ops) {
err = -ENODEV;
} else if (!rtc->ops->read_alarm) {
} else if (!test_bit(RTC_FEATURE_ALARM, rtc->features) || !rtc->ops->read_alarm) {
err = -EINVAL;
} else {
memset(alarm, 0, sizeof(struct rtc_wkalrm));
......@@ -436,7 +436,7 @@ static int __rtc_set_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
if (!rtc->ops)
err = -ENODEV;
else if (!rtc->ops->set_alarm)
else if (!test_bit(RTC_FEATURE_ALARM, rtc->features))
err = -EINVAL;
else
err = rtc->ops->set_alarm(rtc->dev.parent, alarm);
......@@ -451,7 +451,7 @@ int rtc_set_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
if (!rtc->ops)
return -ENODEV;
else if (!rtc->ops->set_alarm)
else if (!test_bit(RTC_FEATURE_ALARM, rtc->features))
return -EINVAL;
err = rtc_valid_tm(&alarm->time);
......@@ -531,7 +531,7 @@ int rtc_alarm_irq_enable(struct rtc_device *rtc, unsigned int enabled)
/* nothing */;
else if (!rtc->ops)
err = -ENODEV;
else if (!rtc->ops->alarm_irq_enable)
else if (!test_bit(RTC_FEATURE_ALARM, rtc->features) || !rtc->ops->alarm_irq_enable)
err = -EINVAL;
else
err = rtc->ops->alarm_irq_enable(rtc->dev.parent, enabled);
......@@ -843,7 +843,7 @@ static int rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer)
static void rtc_alarm_disable(struct rtc_device *rtc)
{
if (!rtc->ops || !rtc->ops->alarm_irq_enable)
if (!rtc->ops || !test_bit(RTC_FEATURE_ALARM, rtc->features) || !rtc->ops->alarm_irq_enable)
return;
rtc->ops->alarm_irq_enable(rtc->dev.parent, false);
......
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2007-2009 ST-Ericsson AB
* RTC clock driver for the AB3100 Analog Baseband Chip
* Author: Linus Walleij <linus.walleij@stericsson.com>
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/rtc.h>
#include <linux/mfd/abx500.h>
/* Clock rate in Hz */
#define AB3100_RTC_CLOCK_RATE 32768
/*
* The AB3100 RTC registers. These are the same for
* AB3000 and AB3100.
* Control register:
* Bit 0: RTC Monitor cleared=0, active=1, if you set it
* to 1 it remains active until RTC power is lost.
* Bit 1: 32 kHz Oscillator, 0 = on, 1 = bypass
* Bit 2: Alarm on, 0 = off, 1 = on
* Bit 3: 32 kHz buffer disabling, 0 = enabled, 1 = disabled
*/
#define AB3100_RTC 0x53
/* default setting, buffer disabled, alarm on */
#define RTC_SETTING 0x30
/* Alarm when AL0-AL3 == TI0-TI3 */
#define AB3100_AL0 0x56
#define AB3100_AL1 0x57
#define AB3100_AL2 0x58
#define AB3100_AL3 0x59
/* This 48-bit register that counts up at 32768 Hz */
#define AB3100_TI0 0x5a
#define AB3100_TI1 0x5b
#define AB3100_TI2 0x5c
#define AB3100_TI3 0x5d
#define AB3100_TI4 0x5e
#define AB3100_TI5 0x5f
/*
* RTC clock functions and device struct declaration
*/
static int ab3100_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
u8 regs[] = {AB3100_TI0, AB3100_TI1, AB3100_TI2,
AB3100_TI3, AB3100_TI4, AB3100_TI5};
unsigned char buf[6];
u64 hw_counter = rtc_tm_to_time64(tm) * AB3100_RTC_CLOCK_RATE * 2;
int err = 0;
int i;
buf[0] = (hw_counter) & 0xFF;
buf[1] = (hw_counter >> 8) & 0xFF;
buf[2] = (hw_counter >> 16) & 0xFF;
buf[3] = (hw_counter >> 24) & 0xFF;
buf[4] = (hw_counter >> 32) & 0xFF;
buf[5] = (hw_counter >> 40) & 0xFF;
for (i = 0; i < 6; i++) {
err = abx500_set_register_interruptible(dev, 0,
regs[i], buf[i]);
if (err)
return err;
}
/* Set the flag to mark that the clock is now set */
return abx500_mask_and_set_register_interruptible(dev, 0,
AB3100_RTC,
0x01, 0x01);
}
static int ab3100_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
time64_t time;
u8 rtcval;
int err;
err = abx500_get_register_interruptible(dev, 0,
AB3100_RTC, &rtcval);
if (err)
return err;
if (!(rtcval & 0x01)) {
dev_info(dev, "clock not set (lost power)");
return -EINVAL;
} else {
u64 hw_counter;
u8 buf[6];
/* Read out time registers */
err = abx500_get_register_page_interruptible(dev, 0,
AB3100_TI0,
buf, 6);
if (err != 0)
return err;
hw_counter = ((u64) buf[5] << 40) | ((u64) buf[4] << 32) |
((u64) buf[3] << 24) | ((u64) buf[2] << 16) |
((u64) buf[1] << 8) | (u64) buf[0];
time = hw_counter / (u64) (AB3100_RTC_CLOCK_RATE * 2);
}
rtc_time64_to_tm(time, tm);
return 0;
}
static int ab3100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
time64_t time;
u64 hw_counter;
u8 buf[6];
u8 rtcval;
int err;
/* Figure out if alarm is enabled or not */
err = abx500_get_register_interruptible(dev, 0,
AB3100_RTC, &rtcval);
if (err)
return err;
if (rtcval & 0x04)
alarm->enabled = 1;
else
alarm->enabled = 0;
/* No idea how this could be represented */
alarm->pending = 0;
/* Read out alarm registers, only 4 bytes */
err = abx500_get_register_page_interruptible(dev, 0,
AB3100_AL0, buf, 4);
if (err)
return err;
hw_counter = ((u64) buf[3] << 40) | ((u64) buf[2] << 32) |
((u64) buf[1] << 24) | ((u64) buf[0] << 16);
time = hw_counter / (u64) (AB3100_RTC_CLOCK_RATE * 2);
rtc_time64_to_tm(time, &alarm->time);
return rtc_valid_tm(&alarm->time);
}
static int ab3100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
u8 regs[] = {AB3100_AL0, AB3100_AL1, AB3100_AL2, AB3100_AL3};
unsigned char buf[4];
time64_t secs;
u64 hw_counter;
int err;
int i;
secs = rtc_tm_to_time64(&alarm->time);
hw_counter = secs * AB3100_RTC_CLOCK_RATE * 2;
buf[0] = (hw_counter >> 16) & 0xFF;
buf[1] = (hw_counter >> 24) & 0xFF;
buf[2] = (hw_counter >> 32) & 0xFF;
buf[3] = (hw_counter >> 40) & 0xFF;
/* Set the alarm */
for (i = 0; i < 4; i++) {
err = abx500_set_register_interruptible(dev, 0,
regs[i], buf[i]);
if (err)
return err;
}
/* Then enable the alarm */
return abx500_mask_and_set_register_interruptible(dev, 0,
AB3100_RTC, (1 << 2),
alarm->enabled << 2);
}
static int ab3100_rtc_irq_enable(struct device *dev, unsigned int enabled)
{
/*
* It's not possible to enable/disable the alarm IRQ for this RTC.
* It does not actually trigger any IRQ: instead its only function is
* to power up the system, if it wasn't on. This will manifest as
* a "power up cause" in the AB3100 power driver (battery charging etc)
* and need to be handled there instead.
*/
if (enabled)
return abx500_mask_and_set_register_interruptible(dev, 0,
AB3100_RTC, (1 << 2),
1 << 2);
else
return abx500_mask_and_set_register_interruptible(dev, 0,
AB3100_RTC, (1 << 2),
0);
}
static const struct rtc_class_ops ab3100_rtc_ops = {
.read_time = ab3100_rtc_read_time,
.set_time = ab3100_rtc_set_time,
.read_alarm = ab3100_rtc_read_alarm,
.set_alarm = ab3100_rtc_set_alarm,
.alarm_irq_enable = ab3100_rtc_irq_enable,
};
static int __init ab3100_rtc_probe(struct platform_device *pdev)
{
int err;
u8 regval;
struct rtc_device *rtc;
/* The first RTC register needs special treatment */
err = abx500_get_register_interruptible(&pdev->dev, 0,
AB3100_RTC, &regval);
if (err) {
dev_err(&pdev->dev, "unable to read RTC register\n");
return -ENODEV;
}
if ((regval & 0xFE) != RTC_SETTING) {
dev_warn(&pdev->dev, "not default value in RTC reg 0x%x\n",
regval);
}
if ((regval & 1) == 0) {
/*
* Set bit to detect power loss.
* This bit remains until RTC power is lost.
*/
regval = 1 | RTC_SETTING;
err = abx500_set_register_interruptible(&pdev->dev, 0,
AB3100_RTC, regval);
/* Ignore any error on this write */
}
rtc = devm_rtc_allocate_device(&pdev->dev);
if (IS_ERR(rtc))
return PTR_ERR(rtc);
rtc->ops = &ab3100_rtc_ops;
/* 48bit counter at (AB3100_RTC_CLOCK_RATE * 2) */
rtc->range_max = U32_MAX;
platform_set_drvdata(pdev, rtc);
return devm_rtc_register_device(rtc);
}
static struct platform_driver ab3100_rtc_driver = {
.driver = {
.name = "ab3100-rtc",
},
};
module_platform_driver_probe(ab3100_rtc_driver, ab3100_rtc_probe);
MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
MODULE_DESCRIPTION("AB3100 RTC Driver");
MODULE_LICENSE("GPL");
......@@ -528,7 +528,7 @@ static irqreturn_t ac100_rtc_irq(int irq, void *data)
unsigned int val = 0;
int ret;
mutex_lock(&chip->rtc->ops_lock);
rtc_lock(chip->rtc);
/* read status */
ret = regmap_read(regmap, AC100_ALM_INT_STA, &val);
......@@ -551,7 +551,7 @@ static irqreturn_t ac100_rtc_irq(int irq, void *data)
}
out:
mutex_unlock(&chip->rtc->ops_lock);
rtc_unlock(chip->rtc);
return IRQ_HANDLED;
}
......
......@@ -458,14 +458,6 @@ static const struct rtc_class_ops armada38x_rtc_ops = {
.set_offset = armada38x_rtc_set_offset,
};
static const struct rtc_class_ops armada38x_rtc_ops_noirq = {
.read_time = armada38x_rtc_read_time,
.set_time = armada38x_rtc_set_time,
.read_alarm = armada38x_rtc_read_alarm,
.read_offset = armada38x_rtc_read_offset,
.set_offset = armada38x_rtc_set_offset,
};
static const struct armada38x_rtc_data armada38x_data = {
.update_mbus_timing = rtc_update_38x_mbus_timing_params,
.read_rtc_reg = read_rtc_register_38x_wa,
......@@ -540,20 +532,15 @@ static __init int armada38x_rtc_probe(struct platform_device *pdev)
}
platform_set_drvdata(pdev, rtc);
if (rtc->irq != -1) {
if (rtc->irq != -1)
device_init_wakeup(&pdev->dev, 1);
rtc->rtc_dev->ops = &armada38x_rtc_ops;
} else {
/*
* If there is no interrupt available then we can't
* use the alarm
*/
rtc->rtc_dev->ops = &armada38x_rtc_ops_noirq;
}
else
clear_bit(RTC_FEATURE_ALARM, rtc->rtc_dev->features);
/* Update RTC-MBUS bridge timing parameters */
rtc->data->update_mbus_timing(rtc);
rtc->rtc_dev->ops = &armada38x_rtc_ops;
rtc->rtc_dev->range_max = U32_MAX;
return devm_rtc_register_device(rtc->rtc_dev);
......