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    xtensa: fix secondary core boot in SMP · ab45fb14
    Max Filippov authored
    There are multiple factors adding to the issue in different
    configurations:
    
    - commit 17290231
    
     ("xtensa: add fixup for double exception raised
      in window overflow") added function window_overflow_restore_a0_fixup to
      double exception vector overlapping reset vector location of secondary
      processor cores.
    - on MMUv2 cores RESET_VECTOR1_VADDR may point to uncached kernel memory
      making code overlapping depend on cache type and size, so that without
      cache or with WT cache reset vector code overwrites double exception
      code, making issue even harder to detect.
    - on MMUv3 cores RESET_VECTOR1_VADDR may point to unmapped area, as
      MMUv3 cores change virtual address map to match MMUv2 layout, but
      reset vector virtual address is given for the original MMUv3 mapping.
    - physical memory region of the secondary reset vector is not reserved
      in the physical memory map, and thus may be allocated and overwritten
      at arbitrary moment.
    
    Fix it as follows:
    
    - move window_overflow_restore_a0_fixup code to .text section.
    - define RESET_VECTOR1_VADDR so that it points to reset vector in the
      cacheable MMUv2 map for cores with MMU.
    - reserve reset vector region in the physical memory map. Drop separate
      literal section and build mxhead.S with text section literals.
    
    Cc: <stable@vger.kernel.org>
    Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
    ab45fb14