1. 01 Sep, 2019 2 commits
    • Max Filippov's avatar
      xtensa: add support for call0 ABI in userspace · 09f8a6db
      Max Filippov authored
      
      
      Provide a Kconfig choice to select whether only the default ABI, only
      call0 ABI or both are supported. The default for XEA2 is windowed, but
      it may change for XEA3. Call0 only runs userspace with PS.WOE disabled.
      Supporting both windowed and call0 ABIs is tricky, as there's no
      indication in the ELF binaries which ABI they use. So it is done by
      probing: each process is started with PS.WOE disabled, but the handler
      of an illegal instruction exception taken with PS.WOE retries faulting
      instruction after enabling PS.WOE. It must happen before any signal is
      delivered to the process, otherwise it may be delivered incorrectly.
      Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
      09f8a6db
    • Max Filippov's avatar
      xtensa: clean up PS_WOE_BIT usage · 9e1e41c4
      Max Filippov authored
      
      
      PS_WOE_BIT is mainly used to generate PS.WOE mask in the code. Introduce
      PS_WOE_MASK macro and use it instead.
      Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
      9e1e41c4
  2. 07 May, 2019 1 commit
  3. 04 Apr, 2019 1 commit
  4. 04 Dec, 2018 1 commit
  5. 05 Nov, 2018 1 commit
    • Max Filippov's avatar
      xtensa: make sure bFLT stack is 16 byte aligned · 0773495b
      Max Filippov authored
      
      
      Xtensa ABI requires stack alignment to be at least 16. In noMMU
      configuration ARCH_SLAB_MINALIGN is used to align stack. Make it at
      least 16.
      
      This fixes the following runtime error in noMMU configuration, caused by
      interaction between insufficiently aligned stack and alloca function,
      that results in corruption of on-stack variable in the libc function
      glob:
      
       Caught unhandled exception in 'sh' (pid = 47, pc = 0x02d05d65)
        - should not happen
        EXCCAUSE is 15
      
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
      0773495b
  6. 31 Oct, 2018 1 commit
  7. 20 Aug, 2018 1 commit
  8. 22 Sep, 2017 1 commit
  9. 28 Jun, 2017 1 commit
  10. 01 May, 2017 1 commit
  11. 17 Nov, 2016 1 commit
  12. 16 Nov, 2016 2 commits
    • Christian Borntraeger's avatar
      locking/core, arch: Remove cpu_relax_lowlatency() · 5bd0b85b
      Christian Borntraeger authored
      
      
      As there are no users left, we can remove cpu_relax_lowlatency()
      implementations from every architecture.
      Signed-off-by: default avatarChristian Borntraeger <borntraeger@de.ibm.com>
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Nicholas Piggin <npiggin@gmail.com>
      Cc: Noam Camus <noamc@ezchip.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Russell King <linux@armlinux.org.uk>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: linuxppc-dev@lists.ozlabs.org
      Cc: virtualization@lists.linux-foundation.org
      Cc: xen-devel@lists.xenproject.org
      Cc: <linux-arch@vger.kernel.org>
      Link: http://lkml.kernel.org/r/1477386195-32736-6-git-send-email-borntraeger@de.ibm.com
      
      Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
      5bd0b85b
    • Christian Borntraeger's avatar
      locking/core: Introduce cpu_relax_yield() · 79ab11cd
      Christian Borntraeger authored
      
      
      For spinning loops people do often use barrier() or cpu_relax().
      For most architectures cpu_relax and barrier are the same, but on
      some architectures cpu_relax can add some latency.
      For example on power,sparc64 and arc, cpu_relax can shift the CPU
      towards other hardware threads in an SMT environment.
      On s390 cpu_relax does even more, it uses an hypercall to the
      hypervisor to give up the timeslice.
      In contrast to the SMT yielding this can result in larger latencies.
      In some places this latency is unwanted, so another variant
      "cpu_relax_lowlatency" was introduced. Before this is used in more
      and more places, lets revert the logic and provide a cpu_relax_yield
      that can be called in places where yielding is more important than
      latency. By default this is the same as cpu_relax on all architectures.
      Signed-off-by: default avatarChristian Borntraeger <borntraeger@de.ibm.com>
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Nicholas Piggin <npiggin@gmail.com>
      Cc: Noam Camus <noamc@ezchip.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Russell King <linux@armlinux.org.uk>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: linuxppc-dev@lists.ozlabs.org
      Cc: virtualization@lists.linux-foundation.org
      Cc: xen-devel@lists.xenproject.org
      Link: http://lkml.kernel.org/r/1477386195-32736-2-git-send-email-borntraeger@de.ibm.com
      
      Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
      79ab11cd
  13. 24 Jul, 2016 1 commit
    • Max Filippov's avatar
      xtensa: minimize use of PLATFORM_DEFAULT_MEM_{ADDR,SIZE} · 3de00482
      Max Filippov authored
      
      
      Now that the kernel load address and KSEG physical base address have
      their own Kconfig symbols PLATFORM_DEFAULT_MEM seems redundant. It makes
      little sense to use it in MMU configurations instead of KSEG_PADDR.
      In noMMU configurations there's no explicit KSEG, so it's still useful
      for the early cache initialization and definition of ARCH_PFN_OFFSET,
      which affects mem_map size.
      
      - limit it to noMMU; MMU variants have XCHAL_KSEG_PADDR and
        XCHAL_KSEG_SIZE;
      - don't use it to define TASK_SIZE or MAX_LOW_PFN: first doesn't make
        any difference in noMMU, second is meaningless as there's no high
        memory;
      - don't add default physical memory region: memory layout should come
        from the DT, bootloader tags, or memmap= command line parameter.
      Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
      3de00482
  14. 11 Mar, 2016 1 commit
    • Max Filippov's avatar
      xtensa: support hardware breakpoints/watchpoints · c91e02bd
      Max Filippov authored
      
      
      Use perf framework to manage hardware instruction and data breakpoints.
      Add two new ptrace calls: PTRACE_GETHBPREGS and PTRACE_SETHBPREGS to
      query and set instruction and data breakpoints.
      Address bit 0 choose instruction (0) or data (1) break register, bits
      31..1 are the register number.
      Both calls transfer two 32-bit words: address (0) and control (1).
      Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set.
      Data breakpoint control word bit 31 is 'trigger on store', bit 30 is
      'trigger on load, bits 29..0 are length. Length 0 is used to clear a
      breakpoint. To set a breakpoint length must be a power of 2 in the range
      1..64 and the address must be length-aligned.
      
      Introduce new thread_info flag: TIF_DB_DISABLED. Set it if debug
      exception is raised by the kernel code accessing watched userspace
      address and disable corresponding data breakpoint. On exit to userspace
      check that flag and, if set, restore all data breakpoints.
      
      Handle debug exceptions raised with PS.EXCM set. This may happen when
      window overflow/underflow handler or fast exception handler hits data
      breakpoint, in which case save and disable all data breakpoints,
      single-step faulting instruction and restore data breakpoints.
      Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
      c91e02bd
  15. 11 Jan, 2016 1 commit
    • Max Filippov's avatar
      xtensa: make fake NMI configurable · e4629194
      Max Filippov authored
      
      
      Do not always use fake NMI when safe, provide Kconfig option instead.
      Print a warning if fake NMI is chosen in unsafe configuration, but allow
      it, because it may work if the user knows that interrupts with
      priorities at or above PMM IRQ are not used. Add a check to NMI handler
      that BUGs if any of these IRQs fire.
      Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
      e4629194
  16. 17 Aug, 2015 1 commit
    • Max Filippov's avatar
      xtensa: implement fake NMI · 38fef73c
      Max Filippov authored
      
      
      In case perf IRQ is the highest of the medium-level IRQs, and is alone
      on its level, it may be treated as NMI:
      - LOCKLEVEL is defined to be one level less than EXCM level,
      - IRQ masking never lowers current IRQ level,
      - new fake exception cause code, EXCCAUSE_MAPPED_NMI is assigned to that
        IRQ; new second level exception handler, do_nmi, assigned to it
        handles it as NMI,
      - atomic operations in configurations without s32c1i still need to mask
        all interrupts.
      
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Acked-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
      38fef73c
  17. 17 Jul, 2014 1 commit
    • Davidlohr Bueso's avatar
      arch, locking: Ciao arch_mutex_cpu_relax() · 3a6bfbc9
      Davidlohr Bueso authored
      The arch_mutex_cpu_relax() function, introduced by 34b133f8
      
      , is
      hacky and ugly. It was added a few years ago to address the fact
      that common cpu_relax() calls include yielding on s390, and thus
      impact the optimistic spinning functionality of mutexes. Nowadays
      we use this function well beyond mutexes: rwsem, qrwlock, mcs and
      lockref. Since the macro that defines the call is in the mutex header,
      any users must include mutex.h and the naming is misleading as well.
      
      This patch (i) renames the call to cpu_relax_lowlatency  ("relax, but
      only if you can do it with very low latency") and (ii) defines it in
      each arch's asm/processor.h local header, just like for regular cpu_relax
      functions. On all archs, except s390, cpu_relax_lowlatency is simply cpu_relax,
      and thus we can take it out of mutex.h. While this can seem redundant,
      I believe it is a good choice as it allows us to move out arch specific
      logic from generic locking primitives and enables future(?) archs to
      transparently define it, similarly to System Z.
      Signed-off-by: default avatarDavidlohr Bueso <davidlohr@hp.com>
      Signed-off-by: default avatarPeter Zijlstra <peterz@infradead.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Anton Blanchard <anton@samba.org>
      Cc: Aurelien Jacquiot <a-jacquiot@ti.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Bharat Bhushan <r65777@freescale.com>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Chen Liqin <liqin.linux@gmail.com>
      Cc: Chris Metcalf <cmetcalf@tilera.com>
      Cc: Christian Borntraeger <borntraeger@de.ibm.com>
      Cc: Chris Zankel <chris@zankel.net>
      Cc: David Howells <dhowells@redhat.com>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Deepthi Dharwar <deepthi@linux.vnet.ibm.com>
      Cc: Dominik Dingel <dingel@linux.vnet.ibm.com>
      Cc: Fenghua Yu <fenghua.yu@intel.com>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
      Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
      Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Helge Deller <deller@gmx.de>
      Cc: Hirokazu Takata <takata@linux-m32r.org>
      Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
      Cc: James E.J. Bottomley <jejb@parisc-linux.org>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Jason Wang <jasowang@redhat.com>
      Cc: Jesper Nilsson <jesper.nilsson@axis.com>
      Cc: Joe Perches <joe@perches.com>
      Cc: Jonas Bonn <jonas@southpole.se>
      Cc: Joseph Myers <joseph@codesourcery.com>
      Cc: Kees Cook <keescook@chromium.org>
      Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com>
      Cc: Lennox Wu <lennox.wu@gmail.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Mark Salter <msalter@redhat.com>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Matt Turner <mattst88@gmail.com>
      Cc: Max Filippov <jcmvbkbc@gmail.com>
      Cc: Michael Neuling <mikey@neuling.org>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Mikael Starvik <starvik@axis.com>
      Cc: Nicolas Pitre <nico@linaro.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Qais Yousef <qais.yousef@imgtec.com>
      Cc: Qiaowei Ren <qiaowei.ren@intel.com>
      Cc: Rafael Wysocki <rafael.j.wysocki@intel.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Richard Henderson <rth@twiddle.net>
      Cc: Richard Kuo <rkuo@codeaurora.org>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Steven Miao <realmz6@gmail.com>
      Cc: Steven Rostedt <srostedt@redhat.com>
      Cc: Stratos Karafotis <stratosk@semaphore.gr>
      Cc: Tim Chen <tim.c.chen@linux.intel.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Vasily Kulikov <segoon@openwall.com>
      Cc: Vineet Gupta <vgupta@synopsys.com>
      Cc: Vineet Gupta <Vineet.Gupta1@synopsys.com>
      Cc: Waiman Long <Waiman.Long@hp.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Wolfram Sang <wsa@the-dreams.de>
      Cc: adi-buildroot-devel@lists.sourceforge.net
      Cc: linux390@de.ibm.com
      Cc: linux-alpha@vger.kernel.org
      Cc: linux-am33-list@redhat.com
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-c6x-dev@linux-c6x.org
      Cc: linux-cris-kernel@axis.com
      Cc: linux-hexagon@vger.kernel.org
      Cc: linux-ia64@vger.kernel.org
      Cc: linux@lists.openrisc.net
      Cc: linux-m32r-ja@ml.linux-m32r.org
      Cc: linux-m32r@ml.linux-m32r.org
      Cc: linux-m68k@lists.linux-m68k.org
      Cc: linux-metag@vger.kernel.org
      Cc: linux-mips@linux-mips.org
      Cc: linux-parisc@vger.kernel.org
      Cc: linuxppc-dev@lists.ozlabs.org
      Cc: linux-s390@vger.kernel.org
      Cc: linux-sh@vger.kernel.org
      Cc: linux-xtensa@linux-xtensa.org
      Cc: sparclinux@vger.kernel.org
      Link: http://lkml.kernel.org/r/1404079773.2619.4.camel@buesod1.americas.hpqcorp.net
      
      Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
      3a6bfbc9
  18. 14 Jan, 2014 1 commit
  19. 24 Feb, 2013 1 commit
  20. 19 Dec, 2012 1 commit
  21. 25 Oct, 2012 1 commit
  22. 16 May, 2012 1 commit
    • Suresh Siddha's avatar
      fork: move the real prepare_to_copy() users to arch_dup_task_struct() · 55ccf3fe
      Suresh Siddha authored
      
      
      Historical prepare_to_copy() is mostly a no-op, duplicated for majority of
      the architectures and the rest following the x86 model of flushing the extended
      register state like fpu there.
      
      Remove it and use the arch_dup_task_struct() instead.
      Suggested-by: default avatarOleg Nesterov <oleg@redhat.com>
      Suggested-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      Signed-off-by: default avatarSuresh Siddha <suresh.b.siddha@intel.com>
      Link: http://lkml.kernel.org/r/1336692811-30576-1-git-send-email-suresh.b.siddha@intel.com
      
      Acked-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: David Howells <dhowells@redhat.com>
      Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Chris Zankel <chris@zankel.net>
      Cc: Richard Henderson <rth@twiddle.net>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
      Cc: Mike Frysinger <vapier@gentoo.org>
      Cc: Mark Salter <msalter@redhat.com>
      Cc: Aurelien Jacquiot <a-jacquiot@ti.com>
      Cc: Mikael Starvik <starvik@axis.com>
      Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
      Cc: Richard Kuo <rkuo@codeaurora.org>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Jonas Bonn <jonas@southpole.se>
      Cc: James E.J. Bottomley <jejb@parisc-linux.org>
      Cc: Helge Deller <deller@gmx.de>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Chen Liqin <liqin.chen@sunplusct.com>
      Cc: Lennox Wu <lennox.wu@gmail.com>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Chris Metcalf <cmetcalf@tilera.com>
      Cc: Jeff Dike <jdike@addtoit.com>
      Cc: Richard Weinberger <richard@nod.at>
      Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
      Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
      55ccf3fe
  23. 02 May, 2010 1 commit
  24. 03 Apr, 2009 2 commits
  25. 06 Nov, 2008 1 commit
  26. 14 Feb, 2008 1 commit
    • Chris Zankel's avatar
      [XTENSA] Add support for configurable registers and coprocessors · c658eac6
      Chris Zankel authored
      
      
      The Xtensa architecture allows to define custom instructions and
      registers. Registers that are bound to a coprocessor are only
      accessible if the corresponding enable bit is set, which allows
      to implement a 'lazy' context switch mechanism. Other registers
      needs to be saved and restore at the time of the context switch
      or during interrupt handling.
      
      This patch adds support for these additional states:
      
      - save and restore registers that are used by the compiler upon
        interrupt entry and exit.
      - context switch additional registers unbound to any coprocessor
      - 'lazy' context switch of registers bound to a coprocessor
      - ptrace interface to provide access to additional registers
      - update configuration files in include/asm-xtensa/variant-fsf
      Signed-off-by: default avatarChris Zankel <chris@zankel.net>
      c658eac6
  27. 08 Feb, 2008 1 commit
  28. 27 Aug, 2007 1 commit
  29. 10 Dec, 2006 1 commit
  30. 12 Jul, 2006 1 commit
  31. 12 Jan, 2006 1 commit
  32. 24 Jun, 2005 1 commit