1. 11 Sep, 2019 4 commits
  2. 26 Apr, 2019 1 commit
  3. 23 Apr, 2019 1 commit
  4. 04 Feb, 2019 6 commits
    • Lukas Wunner's avatar
      dmaengine: bcm2835: Drop outdated comment on supported transactions · 37c22cab
      Lukas Wunner authored
      
      
      Remove an outdated comment claiming the driver only supports cyclic
      transactions.  The driver has been supporting other transaction types
      for more than two years.
      Signed-off-by: default avatarLukas Wunner <lukas@wunner.de>
      Cc: Frank Pavlic <f.pavlic@kunbus.de>
      Cc: Martin Sperl <kernel@martin.sperl.org>
      Cc: Florian Meier <florian.meier@koalo.de>
      Tested-by: default avatarStefan Wahren <stefan.wahren@i2se.com>
      Acked-by: default avatarFlorian Kauer <florian.kauer@koalo.de>
      Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
      37c22cab
    • Lukas Wunner's avatar
      dmaengine: bcm2835: Drop gratuitous list deletion · efdffc1a
      Lukas Wunner authored
      
      
      The BCM2835 DMA driver deletes a channel from a list upon termination
      without having added it to a list first.  Moreover that operation is
      protected by a spinlock which isn't taken anywhere else.  These appear
      to be remnants of an older version of the driver which accidentally
      got mainlined.  Remove the dead code.
      Signed-off-by: default avatarLukas Wunner <lukas@wunner.de>
      Cc: Frank Pavlic <f.pavlic@kunbus.de>
      Cc: Martin Sperl <kernel@martin.sperl.org>
      Cc: Florian Meier <florian.meier@koalo.de>
      Tested-by: default avatarStefan Wahren <stefan.wahren@i2se.com>
      Acked-by: default avatarFlorian Kauer <florian.kauer@koalo.de>
      Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
      efdffc1a
    • Lukas Wunner's avatar
      dmaengine: bcm2835: Enforce control block alignment · 603fe86b
      Lukas Wunner authored
      Per section 4.2.1.1 of the BCM2835 ARM Peripherals spec, control blocks
      "must start at a 256 bit aligned address":
      https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
      
      
      
      This rule is currently satisfied only by accident because struct
      bcm2835_dma_cb has a size of 256 bit and the DMA pool API happens to
      allocate blocks consecutively.  It seems safer to be explicit and tell
      the DMA pool allocator about the required alignment.
      Signed-off-by: default avatarLukas Wunner <lukas@wunner.de>
      Cc: Frank Pavlic <f.pavlic@kunbus.de>
      Cc: Martin Sperl <kernel@martin.sperl.org>
      Cc: Florian Meier <florian.meier@koalo.de>
      Tested-by: default avatarStefan Wahren <stefan.wahren@i2se.com>
      Acked-by: default avatarFlorian Kauer <florian.kauer@koalo.de>
      Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
      603fe86b
    • Lukas Wunner's avatar
      dmaengine: bcm2835: Return void from abort of transactions · 3e05ada0
      Lukas Wunner authored
      
      
      bcm2835_dma_abort() returns an int but bcm2835_dma_terminate_all() (its
      sole caller) does not evaluate the return value. Change the return type
      to void.
      Signed-off-by: default avatarLukas Wunner <lukas@wunner.de>
      Cc: Frank Pavlic <f.pavlic@kunbus.de>
      Cc: Martin Sperl <kernel@martin.sperl.org>
      Cc: Florian Meier <florian.meier@koalo.de>
      Tested-by: default avatarStefan Wahren <stefan.wahren@i2se.com>
      Acked-by: default avatarFlorian Kauer <florian.kauer@koalo.de>
      Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
      3e05ada0
    • Lukas Wunner's avatar
      dmaengine: bcm2835: Fix abort of transactions · 9e528c79
      Lukas Wunner authored
      There are multiple issues with bcm2835_dma_abort() (which is called on
      termination of a transaction):
      
      * The algorithm to abort the transaction first pauses the channel by
        clearing the ACTIVE flag in the CS register, then waits for the PAUSED
        flag to clear.  Page 49 of the spec documents the latter as follows:
      
        "Indicates if the DMA is currently paused and not transferring data.
         This will occur if the active bit has been cleared [...]"
         https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
      
        So the function is entering an infinite loop because it is waiting for
        PAUSED to clear which is always set due to the function having cleared
        the ACTIVE flag.  The only thing that's saving it from itself is the
        upper bound of 10000 loop iterations.
      
        The code comment says that the intention is to "wait for any current
        AXI transfer to complete", so the author probably wanted to check the
        WAITING_FOR_OUTSTANDING_WRITES flag instead.  Amend the function
        accordingly.
      
      * The CS register is only read at the beginning of the function.  It
        needs to be read again after pausing the channel and before checking
        for outstanding writes, otherwise writes which were issued between
        the register read at the beginning of the function and pausing the
        channel may not be waited for.
      
      * The function seeks to abort the transfer by writing 0 to the NEXTCONBK
        register and setting the ABORT and ACTIVE flags.  Thereby, the 0 in
        NEXTCONBK is sought to be loaded into the CONBLK_AD register.  However
        experimentation has shown this approach to not work:  The CONBLK_AD
        register remains the same as before and the CS register contains
        0x00000030 (PAUSED | DREQ_STOPS_DMA).  In other words, the control
        block is not aborted but merely paused and it will be resumed once the
        next DMA transaction is started.  That is absolutely not the desired
        behavior.
      
        A simpler approach is to set the channel's RESET flag instead.  This
        reliably zeroes the NEXTCONBK as well as the CS register.  It requires
        less code and only a single MMIO write.  This is also what popular
        user space DMA drivers do, e.g.:
        https://github.com/metachris/RPIO/blob/master/source/c_pwm/pwm.c
      
        Note that the spec is contradictory whether the NEXTCONBK register
        is writeable at all.  On the one hand, page 41 claims:
      
        "The value loaded into the NEXTCONBK register can be overwritten so
        that the linked list of Control Block data structures can be
        dynamically altered. However it is only safe to do this when the DMA
        is paused."
      
        On the other hand, page 40 specifies:
      
        "Only three registers in each channel's register set are directly
        writeable (CS, CONBLK_AD and DEBUG). The other registers (TI,
        SOURCE_AD, DEST_AD, TXFR_LEN, STRIDE & NEXTCONBK), are automatically
        loaded from a Control Block data structure held in external memory."
      
      Fixes: 96286b57
      
       ("dmaengine: Add support for BCM2835")
      Signed-off-by: default avatarLukas Wunner <lukas@wunner.de>
      Cc: stable@vger.kernel.org # v3.14+
      Cc: Frank Pavlic <f.pavlic@kunbus.de>
      Cc: Martin Sperl <kernel@martin.sperl.org>
      Cc: Florian Meier <florian.meier@koalo.de>
      Cc: Clive Messer <clive.m.messer@gmail.com>
      Cc: Matthias Reichl <hias@horus.com>
      Tested-by: default avatarStefan Wahren <stefan.wahren@i2se.com>
      Acked-by: default avatarFlorian Kauer <florian.kauer@koalo.de>
      Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
      9e528c79
    • Lukas Wunner's avatar
      dmaengine: bcm2835: Fix interrupt race on RT · f7da7782
      Lukas Wunner authored
      If IRQ handlers are threaded (either because CONFIG_PREEMPT_RT_BASE is
      enabled or "threadirqs" was passed on the command line) and if system
      load is sufficiently high that wakeup latency of IRQ threads degrades,
      SPI DMA transactions on the BCM2835 occasionally break like this:
      
      ks8851 spi0.0: SPI transfer timed out
      bcm2835-dma 3f007000.dma: DMA transfer could not be terminated
      ks8851 spi0.0 eth2: ks8851_rdfifo: spi_sync() failed
      
      The root cause is an assumption made by the DMA driver which is
      documented in a code comment in bcm2835_dma_terminate_all():
      
      /*
       * Stop DMA activity: we assume the callback will not be called
       * after bcm_dma_abort() returns (even if it does, it will see
       * c->desc is NULL and exit.)
       */
      
      That assumption falls apart if the IRQ handler bcm2835_dma_callback() is
      threaded: A client may terminate a descriptor and issue a new one
      before the IRQ handler had a chance to run. In fact the IRQ handler may
      miss an *arbitrary* number of descriptors. The result is the following
      race condition:
      
      1. A descriptor finishes, its interrupt is deferred to the IRQ thread.
      2. A client calls dma_terminate_async() which sets channel->desc = NULL.
      3. The client issues a new descriptor. Because channel->desc is NULL,
         bcm2835_dma_issue_pending() immediately starts the descriptor.
      4. Finally the IRQ thread runs and writes BCM2835_DMA_INT to the CS
         register to acknowledge the interrupt. This clears the ACTIVE flag,
         so the newly issued descriptor is paused in the middle of the
         transaction. Because channel->desc is not NULL, the IRQ thread
         finalizes the descriptor and tries to start the next one.
      
      I see two possible solutions: The first is to call synchronize_irq()
      in bcm2835_dma_issue_pending() to wait until the IRQ thread has
      finished before issuing a new descriptor. The downside of this approach
      is unnecessary latency if clients desire rapidly terminating and
      re-issuing descriptors and don't have any use for an IRQ callback.
      (The SPI TX DMA channel is a case in point.)
      
      A better alternative is to make the IRQ thread recognize that it has
      missed descriptors and avoid finalizing the newly issued descriptor.
      So first of all, set the ACTIVE flag when acknowledging the interrupt.
      This keeps a newly issued descriptor running.
      
      If the descriptor was finished, the channel remains idle despite the
      ACTIVE flag being set. However the ACTIVE flag can then no longer be
      used to check whether the channel is idle, so instead check whether
      the register containing the current control block address is zero
      and finalize the current descriptor only if so.
      
      That way, there is no impact on latency and throughput if the client
      doesn't care for the interrupt: Only minimal additional overhead is
      introduced for non-cyclic descriptors as one further MMIO read is
      necessary per interrupt to check for idleness of the channel. Cyclic
      descriptors are sped up slightly by removing one MMIO write per
      interrupt.
      
      Fixes: 96286b57
      
       ("dmaengine: Add support for BCM2835")
      Signed-off-by: default avatarLukas Wunner <lukas@wunner.de>
      Cc: stable@vger.kernel.org # v3.14+
      Cc: Frank Pavlic <f.pavlic@kunbus.de>
      Cc: Martin Sperl <kernel@martin.sperl.org>
      Cc: Florian Meier <florian.meier@koalo.de>
      Cc: Clive Messer <clive.m.messer@gmail.com>
      Cc: Matthias Reichl <hias@horus.com>
      Tested-by: default avatarStefan Wahren <stefan.wahren@i2se.com>
      Acked-by: default avatarFlorian Kauer <florian.kauer@koalo.de>
      Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
      f7da7782
  5. 07 Jan, 2019 1 commit
    • Gustavo A. R. Silva's avatar
      dmaengine: bcm2835: Use struct_size() in kzalloc() · 5fde6005
      Gustavo A. R. Silva authored
      
      
      One of the more common cases of allocation size calculations is finding the
      size of a structure that has a zero-sized array at the end, along with memory
      for some number of elements for that array. For example:
      
      struct foo {
          int stuff;
          void *entry[];
      };
      
      instance = kzalloc(sizeof(struct foo) + sizeof(void *) * count, GFP_KERNEL);
      
      Instead of leaving these open-coded and prone to type mistakes, we can now
      use the new struct_size() helper:
      
      instance = kzalloc(struct_size(instance, entry, count), GFP_KERNEL);
      
      This code was detected with the help of Coccinelle.
      Signed-off-by: default avatarGustavo A. R. Silva <gustavo@embeddedor.com>
      Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
      5fde6005
  6. 11 Nov, 2018 2 commits
  7. 07 Oct, 2018 1 commit
  8. 04 Dec, 2017 1 commit
  9. 06 Mar, 2017 1 commit
  10. 06 Jul, 2016 1 commit
    • Arnd Bergmann's avatar
      dmaengine: bcm2835: fix 64-bit warning · 9a8d0efa
      Arnd Bergmann authored
      
      
      When building this driver on arm64, we get a harmless type
      mismatch warning:
      
      drivers/dma/bcm2835-dma.c: In function 'bcm2835_dma_fill_cb_chain_with_sg':
      include/linux/kernel.h:743:17: warning: comparison of distinct pointer types lacks a cast
        (void) (&_min1 == &_min2);  \
                       ^
      drivers/dma/bcm2835-dma.c:409:21: note: in expansion of macro 'min'
          cb->cb->length = min(len, max_len);
      
      This changes the type of the 'len' variable to size_t, which
      avoids the problem.
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Fixes: 388cc7a2
      
       ("dmaengine: bcm2835: add slave_sg support to bcm2835-dma")
      Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      9a8d0efa
  11. 01 Jul, 2016 1 commit
    • Arnd Bergmann's avatar
      dmaengine: bcm2835: fix 64-bit warning · 4aa819c7
      Arnd Bergmann authored
      
      
      When building this driver on arm64, we get a harmless type
      mismatch warning:
      
      drivers/dma/bcm2835-dma.c: In function 'bcm2835_dma_fill_cb_chain_with_sg':
      include/linux/kernel.h:743:17: warning: comparison of distinct pointer types lacks a cast
        (void) (&_min1 == &_min2);  \
                       ^
      drivers/dma/bcm2835-dma.c:409:21: note: in expansion of macro 'min'
          cb->cb->length = min(len, max_len);
      
      This changes the type of the 'len' variable to size_t, which
      avoids the problem.
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Fixes: 388cc7a2
      
       ("dmaengine: bcm2835: add slave_sg support to bcm2835-dma")
      Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      4aa819c7
  12. 08 Jun, 2016 1 commit
  13. 02 May, 2016 1 commit
  14. 19 Apr, 2016 1 commit
    • Martin Sperl's avatar
      dmaengine: bcm2835: use platform_get_irq_byname · e2eca638
      Martin Sperl authored
      
      
      Use platform_get_irq_byname to allow for correct mapping of
      interrupts to dma channels.
      
      The currently implemented device tree is unfortunately
      implemented with the wrong assumption, that each dma-channel
      has its own dma channel, but dma-irq 11 is handling
      dma-channel 11-14 and dma-irq 12 is actually a "catch all"
      interrupt.
      
      So here we use the byname variant and require that interrupts
      are explicitly named via the interrupts-name property in the
      device tree.
      
      The use of shared interrupts is also implemented.
      
      As a side-effect this means we can now use dma channels 12, 13 and 14
      in a correct manner - also testing shows that onl using
      channels 11 to 14 for spi and i2s works perfectly (when playing
      some video)
      Signed-off-by: default avatarMartin Sperl <kernel@martin.sperl.org>
      Acked-by: default avatarEric Anholt <eric@anholt.net>
      Acked-by: Mark Rutland's avatarMark Rutland <mark.rutland@arm.com>
      Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      e2eca638
  15. 15 Apr, 2016 8 commits
  16. 05 Dec, 2015 1 commit
  17. 30 Mar, 2015 1 commit
  18. 22 Dec, 2014 3 commits
  19. 06 Nov, 2014 2 commits
  20. 20 Oct, 2014 1 commit
  21. 04 Aug, 2014 1 commit