1. 20 Aug, 2019 1 commit
  2. 15 Aug, 2019 2 commits
    • Linus Walleij's avatar
      gpio: thunderx: Switch to GPIOLIB_IRQCHIP · a7fc89f9
      Linus Walleij authored
      Use the new infrastructure for hierarchical irqchips in
      The major part of the rewrite was dues to the fact that
      the driver was passing around a per-irq pointer to
      struct thunderx_line * data container, and the central
      handlers will assume struct gpio_chip * to be passed
      to we need to use the hwirq as index to look up the
      struct thunderx_line * for each IRQ.
      The pushing and pop:ing of the irqdomain was confusing
      because I've never seen this before, but I tried to
      replicate it as best I could.
      I have no chance to test or debug this so I need
      Cc: David Daney <david.daney@cavium.com>
      Cc: Thierry Reding <treding@nvidia.com>
      Cc: Brian Masney <masneyb@onstation.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Link: https://lore.kernel.org/r/20190808123242.5359-4-linus.walleij@linaro.org
    • Linus Walleij's avatar
      gpio: ixp4xx: Convert to hierarchical GPIOLIB_IRQCHIP · aa7d618a
      Linus Walleij authored
      This modifies the IXP4xx driver to use the new helpers
      to handle the remapping of parent to child hardware irqs
      in the gpiolib core.
      This pulls the majority of the code out of the driver
      and use the generic code in gpiolib.
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Lina Iyer <ilina@codeaurora.org>
      Cc: Jon Hunter <jonathanh@nvidia.com>
      Cc: Sowjanya Komatineni <skomatineni@nvidia.com>
      Cc: Bitan Biswas <bbiswas@nvidia.com>
      Cc: linux-tegra@vger.kernel.org
      Cc: Thierry Reding <treding@nvidia.com>
      Cc: Brian Masney <masneyb@onstation.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Link: https://lore.kernel.org/r/20190808123242.5359-2-linus.walleij@linaro.org
  3. 12 Aug, 2019 1 commit
  4. 15 Jul, 2019 1 commit
  5. 04 Jul, 2019 1 commit
  6. 27 Jun, 2019 1 commit
  7. 10 Jun, 2019 1 commit
  8. 07 Jun, 2019 1 commit
  9. 28 May, 2019 1 commit
  10. 24 May, 2019 1 commit
    • Randy Dunlap's avatar
      gpio: fix gpio-adp5588 build errors · e9646f0f
      Randy Dunlap authored
      The gpio-adp5588 driver uses interfaces that are provided by
      GPIOLIB_IRQCHIP, so select that symbol in its Kconfig entry.
      Fixes these build errors:
      ../drivers/gpio/gpio-adp5588.c: In function ‘adp5588_irq_handler’:
      ../drivers/gpio/gpio-adp5588.c:266:26: error: ‘struct gpio_chip’ has no member named ‘irq’
                  dev->gpio_chip.irq.domain, gpio));
      ../drivers/gpio/gpio-adp5588.c: In function ‘adp5588_irq_setup’:
      ../drivers/gpio/gpio-adp5588.c:298:2: error: implicit declaration of function ‘gpiochip_irqchip_add_nested’ [-Werror=implicit-function-declaration]
        ret = gpiochip_irqchip_add_nested(&dev->gpio_chip,
      ../drivers/gpio/gpio-adp5588.c:307:2: error: implicit declaration of function ‘gpiochip_set_nested_irqchip’ [-Werror=implicit-function-declaration]
      Fixes: 459773ae
       ("gpio: adp5588-gpio: support interrupt controller")
      Reported-by: default avatarkbuild test robot <lkp@intel.com>
      Signed-off-by: default avatarRandy Dunlap <rdunlap@infradead.org>
      Cc: linux-gpio@vger.kernel.org
      Reviewed-by: default avatarBartosz Golaszewski <bgolaszewski@baylibre.com>
      Acked-by: default avatarMichael Hennerich <michael.hennerich@analog.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
  11. 21 May, 2019 1 commit
  12. 08 May, 2019 1 commit
  13. 23 Apr, 2019 1 commit
    • Linus Walleij's avatar
      gpio: ixp4xx: Add driver for the IXP4xx GPIO · 813e7d36
      Linus Walleij authored
      This adds a driver for the IXP4xx GPIO block found in
      the Intel XScale IXP4xx systems.
      The GPIO part of this block is pretty straight-forward and
      just uses the generic MMIO GPIO library.
      The irqchip side of this driver is hierarchical where
      the main irqchip will receive a processed level trigger
      in response to the edge detector of the GPIO block,
      so for this reason the v2 version of the irqdomain API
      is used (as well as in the parent IXP4xx irqchip) and
      masking, unmasking and setting up the type on IRQ
      happens on several levels.
      Currently this GPIO controller will grab the parent
      irqdomain using a special function, but as the platform
      move toward device tree probing, this will not be needed:
      we can just look up the parent irqdomain from the device
      Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
  14. 19 Apr, 2019 1 commit
  15. 04 Apr, 2019 1 commit
  16. 27 Mar, 2019 1 commit
  17. 26 Mar, 2019 1 commit
  18. 22 Mar, 2019 2 commits
  19. 20 Mar, 2019 1 commit
  20. 22 Feb, 2019 1 commit
  21. 09 Feb, 2019 1 commit
  22. 28 Jan, 2019 1 commit
  23. 21 Jan, 2019 1 commit
  24. 22 Dec, 2018 1 commit
  25. 21 Dec, 2018 2 commits
  26. 17 Dec, 2018 1 commit
  27. 07 Dec, 2018 1 commit
    • Vladimir Zapolskiy's avatar
      gpio: lpc18xx: add GPIO pin interrupt controller support · 5ddabfe8
      Vladimir Zapolskiy authored
      The change adds support of LPC18xx/LPC43xx GPIO pin interrupt controller
      block within SoC GPIO controller. The new interrupt controller driver
      allows to configure and capture edge or level interrupts on 8 arbitrary
      selectedinput GPIO pins, and lift the signals to be reported as NVIC rising
      edge interrupts. Configuration of a particular GPIO pin to serve as
      interrupt and its mapping to an interrupt on NVIC is done by SCU pin
      controller, for more details see description of 'nxp,gpio-pin-interrupt'
      device tree property of a GPIO pin [1].
      From LPC18xx and LPC43xx User Manuals the GPIO controller consists of
      the following blocks:
      * GPIO pin interrupt block at 0x40087000, this change adds its support,
      * GPIO GROUP0 interrupt block at 0x40088000,
      * GPIO GROUP1 interrupt block at 0x40089000,
      * GPIO port block at 0x400F4000, it is supported by the original driver.
      While all 4 sub-controller blocks have their own I/O addresses, moreover
      all 3 interrupt blocks are APB0 peripherals and high-speed GPIO block is
      an AHB slave, according to the hardware manual the GPIO controller is
      seen as a single block, and 4 sub-controllers have the shared reset signal
      RGU #28 and clock to register interface CLK_CPU_GPIO on CCU1.
      Likely support of two GPIO group interrupt blocks won't be added in short
      term, because the mechanism to mask several interrupt sources is not well
      [1] Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt
      Signed-off-by: default avatarVladimir Zapolskiy <vz@mleia.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
  28. 15 Oct, 2018 1 commit
    • Randy Dunlap's avatar
      gpio: fix SNPS_CREG kconfig dependency warning · a7c0b4b8
      Randy Dunlap authored
      Fix kconfig warning for GPIO_SNPS_CREG:
      WARNING: unmet direct dependencies detected for OF_GPIO
        Depends on [n]: GPIOLIB [=y] && OF [=n] && HAS_IOMEM [=y]
        Selected by [y]:
        - GPIO_SNPS_CREG [=y] && GPIOLIB [=y] && HAS_IOMEM [=y] && (ARC || COMPILE_TEST [=y])
      Drivers in drivers/gpio/Kconfig depend on OF_GPIO, not select it.
      This prevents attempting to build when OF is not enabled.
      Signed-off-by: default avatarRandy Dunlap <rdunlap@infradead.org>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: linux-gpio@vger.kernel.org
      Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
  29. 10 Oct, 2018 1 commit
  30. 28 Sep, 2018 1 commit
  31. 29 Aug, 2018 3 commits
  32. 10 Aug, 2018 1 commit
  33. 13 Jul, 2018 1 commit
  34. 09 Jul, 2018 1 commit
  35. 05 Jun, 2018 1 commit