Commit b55b6d33 authored by Rebecca Cran's avatar Rebecca Cran Committed by mergify[bot]
Browse files

ArmPlatformPkg: Remove RVCT support



RVCT is obsolete and no longer used.
Remove support for it.
Signed-off-by: default avatarRebecca Cran <quic_rcran@quicinc.com>
Reviewed-by: default avatarArd Biesheuvel <ardb@kernel.org>
parent 35d9b7ea
//
// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//
#include <Library/ArmLib.h>
INCLUDE AsmMacroIoLib.inc
EXPORT ArmPlatformPeiBootAction
EXPORT ArmPlatformGetCorePosition
EXPORT ArmPlatformGetPrimaryCoreMpId
EXPORT ArmPlatformIsPrimaryCore
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
PRESERVE8
AREA ArmPlatformNullHelper, CODE, READONLY
ArmPlatformPeiBootAction FUNCTION
bx lr
ENDFUNC
//UINTN
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
ArmPlatformGetCorePosition FUNCTION
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #7
bx lr
ENDFUNC
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ArmPlatformGetPrimaryCoreMpId FUNCTION
mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)
bx lr
ENDFUNC
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ArmPlatformIsPrimaryCore FUNCTION
mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
and r0, r0, r1
mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
cmp r0, r1
moveq r0, #1
movne r0, #0
bx lr
ENDFUNC
END
......@@ -29,7 +29,6 @@
[Sources.Arm]
Arm/ArmPlatformHelper.S | GCC
Arm/ArmPlatformHelper.asm | RVCT
[Sources.AArch64]
AArch64/ArmPlatformHelper.S
......
//
// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//
#include <AutoGen.h>
INCLUDE AsmMacroIoLib.inc
EXPORT ArmPlatformStackSet
EXPORT ArmPlatformStackSetPrimary
EXPORT ArmPlatformStackSetSecondary
IMPORT ArmPlatformIsPrimaryCore
IMPORT ArmPlatformGetCorePosition
IMPORT ArmPlatformGetPrimaryCoreMpId
IMPORT _gPcd_FixedAtBuild_PcdCoreCount
PRESERVE8
AREA ArmPlatformStackLib, CODE, READONLY
//VOID
//ArmPlatformStackSet (
// IN UINTN StackBase,
// IN UINTN MpId,
// IN UINTN PrimaryStackSize,
// IN UINTN SecondaryStackSize
// );
ArmPlatformStackSet FUNCTION
// Save parameters
mov r6, r3
mov r5, r2
mov r4, r1
mov r3, r0
// Save the Link register
mov r7, lr
// Identify Stack
mov r0, r1
bl ArmPlatformIsPrimaryCore
cmp r0, #1
// Restore parameters
mov r0, r3
mov r1, r4
mov r2, r5
mov r3, r6
// Restore the Link register
mov lr, r7
beq ArmPlatformStackSetPrimary
bne ArmPlatformStackSetSecondary
ENDFUNC
//VOID
//ArmPlatformStackSetPrimary (
// IN UINTN StackBase,
// IN UINTN MpId,
// IN UINTN PrimaryStackSize,
// IN UINTN SecondaryStackSize
// );
ArmPlatformStackSetPrimary FUNCTION
mov r4, lr
// Add stack of primary stack to StackBase
add r0, r0, r2
// Compute SecondaryCoresCount * SecondaryCoreStackSize
mov32 r1, FixedPcdGet32 (PcdCoreCount)
sub r1, #1
mul r3, r3, r1
// Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCount * SecondaryCoreStackSize))
add sp, r0, r3
bx r4
ENDFUNC
//VOID
//ArmPlatformStackSetSecondary (
// IN UINTN StackBase,
// IN UINTN MpId,
// IN UINTN PrimaryStackSize,
// IN UINTN SecondaryStackSize
// );
ArmPlatformStackSetSecondary FUNCTION
mov r4, lr
mov sp, r0
// Get Core Position
mov r0, r1
bl ArmPlatformGetCorePosition
mov r5, r0
// Get Primary Core Position
bl ArmPlatformGetPrimaryCoreMpId
bl ArmPlatformGetCorePosition
// Get Secondary Core Position. We should get consecutive secondary stack number from 1...(CoreCount-1)
cmp r5, r0
subhi r5, r5, #1
add r5, r5, #1
// Compute top of the secondary stack
mul r3, r3, r5
// Set stack
add sp, sp, r3
bx r4
ENDFUNC
END
......@@ -21,7 +21,6 @@
ArmPlatformPkg/ArmPlatformPkg.dec
[Sources.ARM]
Arm/ArmPlatformStackLib.asm | RVCT
Arm/ArmPlatformStackLib.S | GCC
[Sources.AARCH64]
......
//
// Copyright (c) 2011, ARM Limited. All rights reserved.
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//
#include <AutoGen.h>
IMPORT PeiCommonExceptionEntry
EXPORT PeiVectorTable
PRESERVE8
AREA PrePeiCoreException, CODE, READONLY, CODEALIGN, ALIGN=5
//============================================================
//Default Exception Handlers
//============================================================
PeiVectorTable
b _DefaultResetHandler
b _DefaultUndefined
b _DefaultSWI
b _DefaultPrefetchAbort
b _DefaultDataAbort
b _DefaultReserved
b _DefaultIrq
b _DefaultFiq
//
// Default Exception handlers: There is no plan to return from any of these exceptions.
// No context saving at all.
//
_DefaultResetHandler
mov r1, lr
cps #0x13 ; Switch to SVC for common stack
mov r0, #0
blx PeiCommonExceptionEntry
_DefaultUndefined
sub r1, LR, #4
cps #0x13 ; Switch to SVC for common stack
mov r0, #1
blx PeiCommonExceptionEntry
_DefaultSWI
sub r1, LR, #4
cps #0x13 ; Switch to SVC for common stack
mov r0, #2
blx PeiCommonExceptionEntry
_DefaultPrefetchAbort
sub r1, LR, #4
cps #0x13 ; Switch to SVC for common stack
mov r0, #3
blx PeiCommonExceptionEntry
_DefaultDataAbort
sub r1, LR, #8
cps #0x13 ; Switch to SVC for common stack
mov r0, #4
blx PeiCommonExceptionEntry
_DefaultReserved
mov r1, lr
cps #0x13 ; Switch to SVC for common stack
mov r0, #5
blx PeiCommonExceptionEntry
_DefaultIrq
sub r1, LR, #4
cps #0x13 ; Switch to SVC for common stack
mov r0, #6
blx PeiCommonExceptionEntry
_DefaultFiq
sub r1, LR, #4
cps #0x13 ; Switch to SVC for common stack
mov r0, #7
blx PeiCommonExceptionEntry
END
//
// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//
#include <AutoGen.h>
INCLUDE AsmMacroIoLib.inc
IMPORT CEntryPoint
IMPORT ArmPlatformGetCorePosition
IMPORT ArmPlatformIsPrimaryCore
IMPORT ArmReadMpidr
IMPORT ArmPlatformPeiBootAction
EXPORT _ModuleEntryPoint
PRESERVE8
AREA PrePeiCoreEntryPoint, CODE, READONLY
StartupAddr DCD CEntryPoint
_ModuleEntryPoint
// Do early platform specific actions
bl ArmPlatformPeiBootAction
// Identify CPU ID
bl ArmReadMpidr
// Keep a copy of the MpId register value
mov r5, r0
// Is it the Primary Core ?
bl ArmPlatformIsPrimaryCore
// Get the top of the primary stacks (and the base of the secondary stacks)
mov32 r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize)
// r0 is equal to 1 if I am the primary core
cmp r0, #1
beq _SetupPrimaryCoreStack
_SetupSecondaryCoreStack
// r1 contains the base of the secondary stacks
// Get the Core Position
mov r6, r1 // Save base of the secondary stacks
mov r0, r5
bl ArmPlatformGetCorePosition
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
add r0, r0, #1
// StackOffset = CorePos * StackSize
mov32 r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
mul r0, r0, r2
// SP = StackBase + StackOffset
add sp, r6, r0
_PrepareArguments
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
mov32 r2, FixedPcdGet32(PcdFvBaseAddress)
ldr r1, [r2, #4]
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
ldr r3, StartupAddr
// Jump to PrePeiCore C code
// r0 = mp_id
// r1 = pei_core_address
mov r0, r5
blx r3
_SetupPrimaryCoreStack
mov sp, r1
mov32 r8, FixedPcdGet64 (PcdCPUCoresStackBase)
mov32 r9, FixedPcdGet32 (PcdInitValueInTempStack)
mov r10, r9
mov r11, r9
mov r12, r9
0:stm r8!, {r9-r12}
cmp r8, r1
blt 0b
b _PrepareArguments
_NeverReturn
b _NeverReturn
END
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
;------------------------------------------------------------------------------
EXPORT SecSwitchStack
AREA Switch_Stack, CODE, READONLY
;/**
; This allows the caller to switch the stack and return
;
; @param StackDelta Signed amount by which to modify the stack pointer
;
; @return Nothing. Goes to the Entry Point passing in the new parameters
;
;**/
;VOID
;EFIAPI
;SecSwitchStack (
; VOID *StackDelta
; );
;
SecSwitchStack
MOV R1, SP
ADD R1, R0, R1
MOV SP, R1
BX LR
END
......@@ -21,11 +21,8 @@
[Sources.ARM]
Arm/ArchPrePeiCore.c
Arm/PrePeiCoreEntryPoint.asm | RVCT
Arm/PrePeiCoreEntryPoint.S | GCC
Arm/SwitchStack.asm | RVCT
Arm/SwitchStack.S | GCC
Arm/Exception.asm | RVCT
Arm/Exception.S | GCC
[Sources.AARCH64]
......
......@@ -21,11 +21,8 @@
[Sources.ARM]
Arm/ArchPrePeiCore.c
Arm/PrePeiCoreEntryPoint.asm | RVCT
Arm/PrePeiCoreEntryPoint.S | GCC
Arm/SwitchStack.asm | RVCT
Arm/SwitchStack.S | GCC
Arm/Exception.asm | RVCT
Arm/Exception.S | GCC
[Sources.AARCH64]
......
//
// Copyright (c) 2011 - 2020, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//
#include <AutoGen.h>
#include <Chipset/ArmV7.h>
INCLUDE AsmMacroIoLib.inc
IMPORT CEntryPoint
IMPORT ArmPlatformIsPrimaryCore
IMPORT ArmReadMpidr
IMPORT ArmPlatformPeiBootAction
IMPORT ArmPlatformStackSet
IMPORT mSystemMemoryEnd
EXPORT _ModuleEntryPoint
PRESERVE8
AREA PrePiCoreEntryPoint, CODE, READONLY
StartupAddr DCD CEntryPoint
_ModuleEntryPoint
// Do early platform specific actions
bl ArmPlatformPeiBootAction
// Get ID of this CPU in multi-core system
bl ArmReadMpidr
// Keep a copy of the MpId register value
mov r8, r0
_SetSVCMode
// Enter SVC mode, Disable FIQ and IRQ
mov r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ)
msr CPSR_c, r1
// Check if we can install the stack at the top of the System Memory or if we need
// to install the stacks at the bottom of the Firmware Device (case the FD is located
// at the top of the DRAM)
_SystemMemoryEndInit
adrll r1, mSystemMemoryEnd
ldrd r2, r3, [r1]
teq r3, #0
moveq r1, r2
mvnne r1, #0
_SetupStackPosition
// r1 = SystemMemoryTop
// Calculate Top of the Firmware Device
mov32 r2, FixedPcdGet32(PcdFdBaseAddress)
mov32 r3, FixedPcdGet32(PcdFdSize)
sub r3, r3, #1
add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
// UEFI Memory Size (stacks are allocated in this region)
mov32 r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize)
//
// Reserve the memory for the UEFI region (contain stacks on its top)
//
// Calculate how much space there is between the top of the Firmware and the Top of the System Memory
subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM
cmp r0, r4
bge _SetupStack
// Case the top of stacks is the FdBaseAddress
mov r1, r2
_SetupStack
// r1 contains the top of the stack (and the UEFI Memory)
// Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment
// one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the
// top of the memory space)
adds r9, r1, #1
bcs _SetupOverflowStack
_SetupAlignedStack
mov r1, r9
b _GetBaseUefiMemory
_SetupOverflowStack
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
// aligned (4KB)
mov32 r9, EFI_PAGE_MASK
and r9, r9, r1
sub r1, r1, r9
_GetBaseUefiMemory
// Calculate the Base of the UEFI Memory
sub r9, r1, r4
_GetStackBase
// r1 = The top of the Mpcore Stacks
// Stack for the primary core = PrimaryCoreStack
mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)
sub r10, r1, r2
// Stack for the secondary core = Number of Cores - 1
mov32 r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
sub r10, r10, r1
// r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
mov r0, r10
mov r1, r8
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)
mov32 r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
bl ArmPlatformStackSet
// Is it the Primary Core ?
mov r0, r8
bl ArmPlatformIsPrimaryCore
cmp r0, #1
bne _PrepareArguments
_PrepareArguments
mov r0, r8
mov r1, r9
mov r2, r10
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
ldr r4, StartupAddr
// Jump to PrePiCore C code
// r0 = MpId
// r1 = UefiMemoryBase
// r2 = StacksBase
blx r4
_NeverReturn
b _NeverReturn
END
......@@ -22,7 +22,6 @@
[Sources.ARM]
Arm/ArchPrePi.c
Arm/ModuleEntryPoint.S | GCC
Arm/ModuleEntryPoint.asm | RVCT
[Sources.AArch64]
AArch64/ArchPrePi.c
......
......@@ -23,7 +23,6 @@
[Sources.ARM]
Arm/ArchPrePi.c
Arm/ModuleEntryPoint.S | GCC
Arm/ModuleEntryPoint.asm | RVCT
[Sources.AArch64]
AArch64/ArchPrePi.c
......