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Commit 5f72f4a7 authored by Vijayenthiran Subramaniam's avatar Vijayenthiran Subramaniam Committed by Thomas Abraham
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rdn2cfg1/run_model: instantiate example pcie hierarchy under x16


Instantiate example PCIe hierarchy file under IO Macro 1's pciex16 port
to enable support for multiple IO Macros. Corresponding software
changes are required to enumerate the devices attached to multiple IO
Macros.

Signed-off-by: Vijayenthiran Subramaniam's avatarVijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: Ibca65d67fc51825337a9e0af70e651eb0339feac
parent 75d89380
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...@@ -38,6 +38,7 @@ YELLOW_FONT="\e[33;1m" ...@@ -38,6 +38,7 @@ YELLOW_FONT="\e[33;1m"
ROOTDIR="../../../../output/rdn2cfg1" ROOTDIR="../../../../output/rdn2cfg1"
OUTDIR=${ROOTDIR}/rdn2cfg1 OUTDIR=${ROOTDIR}/rdn2cfg1
MINIMAL_EP_TOPOLOGY_FILE="../../pcie_hierarchies/exerciser_minimal_ep.json" MINIMAL_EP_TOPOLOGY_FILE="../../pcie_hierarchies/exerciser_minimal_ep.json"
EXAMPLE_TOPOLOGY_FILE1="../../pcie_hierarchies/example_pcie_hierarchy_1.json"
MODEL_TYPE="rdn2cfg1" MODEL_TYPE="rdn2cfg1"
MODEL_PARAMS="" MODEL_PARAMS=""
FS_TYPE="" FS_TYPE=""
...@@ -270,7 +271,7 @@ PARAMS="--data css.scp.armcortexm7ct=$OUTDIR/scp_ramfw.bin@0x0BD80000 \ ...@@ -270,7 +271,7 @@ PARAMS="--data css.scp.armcortexm7ct=$OUTDIR/scp_ramfw.bin@0x0BD80000 \
-C io_macro_0.pciex8.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \ -C io_macro_0.pciex8.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \
-C io_macro_0.pciex4_0.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \ -C io_macro_0.pciex4_0.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \
-C io_macro_0.pciex4_1.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \ -C io_macro_0.pciex4_1.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \
-C io_macro_1.pciex16.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \ -C io_macro_1.pciex16.pcie_rc.hierarchy_file_name=${EXAMPLE_TOPOLOGY_FILE1} \
-C io_macro_1.pciex8.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \ -C io_macro_1.pciex8.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \
-C io_macro_1.pciex4_1.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \ -C io_macro_1.pciex4_1.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \
-C io_macro_1.pciex4_0.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \ -C io_macro_1.pciex4_0.pcie_rc.hierarchy_file_name=${MINIMAL_EP_TOPOLOGY_FILE} \
......
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